tcl/target/nrf52.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 #
   4 # Nordic nRF52 series: ARM Cortex-M4 @ 64 MHz
   5 #
   6
   7 source [find target/swj-dp.tcl]
   8 source [find mem_helper.tcl]
   9
  10 if { [info exists CHIPNAME] } {
  11         set _CHIPNAME $CHIPNAME
  12 } else {
  13         set _CHIPNAME nrf52
  14 }
  15
  16 # Work-area is a space in RAM used for flash programming
  17 # By default use 16kB
  18 if { [info exists WORKAREASIZE] } {
  19    set _WORKAREASIZE $WORKAREASIZE
  20 } else {
  21    set _WORKAREASIZE 0x4000
  22 }
  23
  24 if { [info exists CPUTAPID] } {
  25         set _CPUTAPID $CPUTAPID
  26 } else {
  27         set _CPUTAPID 0x2ba01477
  28 }
  29
  30 swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
  31 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  32
  33 set _TARGETNAME $_CHIPNAME.cpu
  34 target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
  35
  36 adapter speed 1000
  37
  38 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  39
  40 if { [using_hla] } {
  41         echo ""
  42         echo "nRF52 device has a CTRL-AP dedicated to recover the device from AP lock."
  43         echo "A high level adapter (like a ST-Link) you are currently using cannot access"
  44         echo "the CTRL-AP so 'nrf52_recover' command will not work."
  45         echo "Do not enable UICR APPROTECT."
  46         echo ""
  47 } else {
  48         cortex_m reset_config sysresetreq
  49
  50         $_TARGETNAME configure -event examine-fail nrf52_check_ap_lock
  51 }
  52
  53 flash bank $_CHIPNAME.flash nrf5 0x00000000 0 1 1 $_TARGETNAME
  54 flash bank $_CHIPNAME.uicr nrf5 0x10001000 0 1 1 $_TARGETNAME
  55
  56 # Test if MEM-AP is locked by UICR APPROTECT
  57 proc nrf52_check_ap_lock {} {
  58         set dap [[target current] cget -dap]
  59         set err [catch {set APPROTECTSTATUS [$dap apreg 1 0xc]}]
  60         if {$err == 0 && $APPROTECTSTATUS != 1} {
  61                 echo "****** WARNING ******"
  62                 echo "nRF52 device has AP lock engaged (see UICR APPROTECT register)."
  63                 echo "Debug access is denied."
  64                 echo "Use 'nrf52_recover' to erase and unlock the device."
  65                 echo ""
  66                 poll off
  67         }
  68 }
  69
  70 # Mass erase and unlock the device using proprietary nRF CTRL-AP (AP #1)
  71 # http://www.ebyte.com produces modules with nRF52 locked by default,
  72 # use nrf52_recover to enable flashing and debug.
  73 proc nrf52_recover {} {
  74         set target [target current]
  75         set dap [$target cget -dap]
  76
  77         set IDR [$dap apreg 1 0xfc]
  78         if {$IDR != 0x02880000} {
  79                 echo "Error: Cannot access nRF52 CTRL-AP!"
  80                 return
  81         }
  82
  83         poll off
  84
  85         # Reset and trigger ERASEALL task
  86         $dap apreg 1 4 0
  87         $dap apreg 1 4 1
  88
  89         for {set i 0} {1} {incr i} {
  90                 set ERASEALLSTATUS [$dap apreg 1 8]
  91                 if {$ERASEALLSTATUS == 0} {
  92                         echo "$target device has been successfully erased and unlocked."
  93                         break
  94                 }
  95                 if {$i == 0} {
  96                         echo "Waiting for chip erase..."
  97                 }
  98                 if {$i >= 150} {
  99                         echo "Error: $target recovery failed."
 100                         break
 101                 }
 102                 sleep 100
 103         }
 104
 105         # Assert reset
 106         $dap apreg 1 0 1
 107
 108         # Deassert reset
 109         $dap apreg 1 0 0
 110
 111         # Reset ERASEALL task
 112         $dap apreg 1 4 0
 113
 114         sleep 100
 115         $target arp_examine
 116         poll on
 117 }
 118
 119 add_help_text nrf52_recover "Mass erase and unlock nRF52 device"
 120
 121 tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
 122
 123 lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
 124 proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname _chipname} {
 125         targets $_targetname
 126
 127         # Read FICR.INFO.PART
 128         set PART [mrw 0x10000100]
 129
 130         switch $PART {
 131                 0x52840 -
 132                 0x52833 -
 133                 0x52832 {
 134                         if { [$_chipname.tpiu cget -protocol] eq "sync" } {
 135                                 if { [$_chipname.tpiu cget -port-width] != 4 } {
 136                                         echo "Error. Device only supports 4-bit sync traces."
 137                                         return
 138                                 }
 139
 140                                 # Set TRACECONFIG.TRACEMUX to enable synchronous trace
 141                                 mmw 0x4000055C 0x00020000 0x00010000
 142                                 $_targetname configure -event reset-end {
 143                                         mmw 0x4000055C 0x00020000 0x00010000
 144                                 }
 145                         } else {
 146                                 # Set TRACECONFIG.TRACEMUX to enable SWO
 147                                 mmw 0x4000055C 0x00010000 0x00020000
 148                                 $_targetname configure -event reset-end {
 149                                         mmw 0x4000055C 0x00010000 0x00020000
 150                                 }
 151                         }
 152                 }
 153                 0x52820 -
 154                 0x52811 -
 155                 0x52810 -
 156                 0x52805 {
 157                         echo "Error: Device does not support TPIU"
 158                         return
 159                 }
 160                 default {
 161                         echo "Error: Unknown device"
 162                         return
 163                 }
 164         }
 165 }
 166
 167 $_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME $_CHIPNAME"