tcl/target: add rescue mode to RP2040 config
[openocd.git] / tcl / target / rp2040.cfg
1 # SPDX-License-Identifier: GPL-2.0-or-later
2
3 # RP2040 is a microcontroller with dual Cortex-M0+ core.
4 # https://www.raspberrypi.com/documentation/microcontrollers/rp2040.html
5
6 # The device requires multidrop SWD for debug.
7 transport select swd
8
9 source [find target/swj-dp.tcl]
10
11 if { [info exists CHIPNAME] } {
12 set _CHIPNAME $CHIPNAME
13 } else {
14 set _CHIPNAME rp2040
15 }
16
17 if { [info exists WORKAREASIZE] } {
18 set _WORKAREASIZE $WORKAREASIZE
19 } else {
20 set _WORKAREASIZE 0x10000
21 }
22
23 if { [info exists CPUTAPID] } {
24 set _CPUTAPID $CPUTAPID
25 } else {
26 set _CPUTAPID 0x01002927
27 }
28
29 # Set to '1' to start rescue mode
30 if { [info exists RESCUE] } {
31 set _RESCUE $RESCUE
32 } else {
33 set _RESCUE 0
34 }
35
36 # Set to '0' or '1' for single core configuration, 'SMP' for -rtos hwthread
37 # handling of both cores, anything else for isolated debugging of both cores
38 if { [info exists USE_CORE] } {
39 set _USE_CORE $USE_CORE
40 } else {
41 set _USE_CORE SMP
42 }
43 set _BOTH_CORES [expr { $_USE_CORE != 0 && $_USE_CORE != 1 }]
44
45 swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
46
47 # The rescue debug port uses the DP CTRL/STAT bit DBGPWRUPREQ to reset the
48 # PSM (power on state machine) of the RP2040 with a flag set in the
49 # VREG_AND_POR_CHIP_RESET register. Once the reset is released
50 # (by clearing the DBGPWRUPREQ flag), the bootrom will run, see this flag,
51 # and halt. Allowing the user to load some fresh code, rather than loading
52 # the potentially broken code stored in flash
53 if { $_RESCUE } {
54 dap create $_CHIPNAME.rescue_dap -chain-position $_CHIPNAME.cpu -dp-id $_CPUTAPID -instance-id 0xf -ignore-syspwrupack
55 init
56
57 # Clear DBGPWRUPREQ
58 $_CHIPNAME.rescue_dap dpreg 0x4 0x00000000
59
60 # Verifying CTRL/STAT is 0
61 set _CTRLSTAT [$_CHIPNAME.rescue_dap dpreg 0x4]
62 if {[expr {$_CTRLSTAT & 0xf0000000}]} {
63 echo "Rescue failed, DP CTRL/STAT readback $_CTRLSTAT"
64 } else {
65 echo "Now restart OpenOCD without RESCUE flag and load code to RP2040"
66 }
67 shutdown
68 }
69
70 # core 0
71 if { $_USE_CORE != 1 } {
72 dap create $_CHIPNAME.dap0 -chain-position $_CHIPNAME.cpu -dp-id $_CPUTAPID -instance-id 0
73 set _TARGETNAME_0 $_CHIPNAME.core0
74 target create $_TARGETNAME_0 cortex_m -dap $_CHIPNAME.dap0 -coreid 0
75 # srst does not exist; use SYSRESETREQ to perform a soft reset
76 $_TARGETNAME_0 cortex_m reset_config sysresetreq
77 }
78
79 # core 1
80 if { $_USE_CORE != 0 } {
81 dap create $_CHIPNAME.dap1 -chain-position $_CHIPNAME.cpu -dp-id $_CPUTAPID -instance-id 1
82 set _TARGETNAME_1 $_CHIPNAME.core1
83 target create $_TARGETNAME_1 cortex_m -dap $_CHIPNAME.dap1 -coreid 1
84 $_TARGETNAME_1 cortex_m reset_config sysresetreq
85 }
86
87 if {[string compare $_USE_CORE SMP] == 0} {
88 $_TARGETNAME_0 configure -rtos hwthread
89 $_TARGETNAME_1 configure -rtos hwthread
90 target smp $_TARGETNAME_0 $_TARGETNAME_1
91 }
92
93 if { $_USE_CORE == 1 } {
94 set _FLASH_TARGET $_TARGETNAME_1
95 } else {
96 set _FLASH_TARGET $_TARGETNAME_0
97 }
98 # Backup the work area. The flash probe runs an algorithm on the target CPU.
99 # The flash is probed during gdb connect if gdb_memory_map is enabled (by default).
100 $_FLASH_TARGET configure -work-area-phys 0x20010000 -work-area-size $_WORKAREASIZE -work-area-backup 1
101 set _FLASHNAME $_CHIPNAME.flash
102 flash bank $_FLASHNAME rp2040_flash 0x10000000 0 0 0 $_FLASH_TARGET
103
104 if { $_BOTH_CORES } {
105 # Alias to ensure gdb connecting to core 1 gets the correct memory map
106 flash bank $_CHIPNAME.alias virtual 0x10000000 0 0 0 $_TARGETNAME_1 $_FLASHNAME
107
108 # Select core 0
109 targets $_TARGETNAME_0
110 }

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