tcl/target/rp2040.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 # RP2040 is a microcontroller with dual Cortex-M0+ core.
   4 # https://www.raspberrypi.com/documentation/microcontrollers/rp2040.html
   5
   6 # The device requires multidrop SWD for debug.
   7 transport select swd
   8
   9 source [find target/swj-dp.tcl]
  10
  11 if { [info exists CHIPNAME] } {
  12         set _CHIPNAME $CHIPNAME
  13 } else {
  14         set _CHIPNAME rp2040
  15 }
  16
  17 if { [info exists WORKAREASIZE] } {
  18         set _WORKAREASIZE $WORKAREASIZE
  19 } else {
  20         set _WORKAREASIZE 0x10000
  21 }
  22
  23 if { [info exists CPUTAPID] } {
  24         set _CPUTAPID $CPUTAPID
  25 } else {
  26         set _CPUTAPID 0x01002927
  27 }
  28
  29 # Set to '0' or '1' for single core configuration,
  30 # anything else for isolated debugging of both cores
  31 if { [info exists USE_CORE] } {
  32         set _USE_CORE $USE_CORE
  33 } else {
  34         set _USE_CORE { 0 1 }
  35 }
  36 set _BOTH_CORES [expr { $_USE_CORE != 0 && $_USE_CORE != 1 }]
  37
  38 swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
  39
  40 # core 0
  41 if { $_USE_CORE != 1 } {
  42         dap create $_CHIPNAME.dap0 -chain-position $_CHIPNAME.cpu -dp-id $_CPUTAPID -instance-id 0
  43         set _TARGETNAME_0 $_CHIPNAME.core0
  44         target create $_TARGETNAME_0 cortex_m -dap $_CHIPNAME.dap0 -coreid 0
  45         # srst does not exist; use SYSRESETREQ to perform a soft reset
  46         $_TARGETNAME_0 cortex_m reset_config sysresetreq
  47 }
  48
  49 # core 1
  50 if { $_USE_CORE != 0 } {
  51         dap create $_CHIPNAME.dap1 -chain-position $_CHIPNAME.cpu -dp-id $_CPUTAPID -instance-id 1
  52         set _TARGETNAME_1 $_CHIPNAME.core1
  53         target create $_TARGETNAME_1 cortex_m -dap $_CHIPNAME.dap1 -coreid 1
  54         $_TARGETNAME_1 cortex_m reset_config sysresetreq
  55 }
  56
  57 if { $_USE_CORE == 1 } {
  58         set _FLASH_TARGET $_TARGETNAME_1
  59 } else {
  60         set _FLASH_TARGET $_TARGETNAME_0
  61 }
  62 # Backup the work area. The flash probe runs an algorithm on the target CPU.
  63 # The flash is probed during gdb connect if gdb_memory_map is enabled (by default).
  64 $_FLASH_TARGET configure -work-area-phys 0x20010000 -work-area-size $_WORKAREASIZE -work-area-backup 1
  65 set _FLASHNAME $_CHIPNAME.flash
  66 flash bank $_FLASHNAME rp2040_flash 0x10000000 0 0 0 $_FLASH_TARGET
  67
  68 if { $_BOTH_CORES } {
  69         # Alias to ensure gdb connecting to core 1 gets the correct memory map
  70         flash bank $_CHIPNAME.alias virtual 0x10000000 0 0 0 $_TARGETNAME_1 $_FLASHNAME
  71
  72         # Select core 0
  73         targets $_TARGETNAME_0
  74 }