1 # Target configuration for the Samsung 2450 system on chip
2 # Processor : ARM926ejs (wb) rev 0 (v4l)
3 # Info: JTAG tap: s3c2450.cpu tap/device found: 0x07926F0F
6 # FIX!!! what to use here?
12 # Really low clock during reset?
16 if { [info exists CHIPNAME] } {
17 set _CHIPNAME $CHIPNAME
22 if { [info exists ENDIAN] } {
25 # this defaults to a bigendian
29 if { [info exists CPUTAPID ] } {
30 set _CPUTAPID $CPUTAPID
32 # force an error till we get a good number
33 set _CPUTAPID 0x07926f0f
37 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xE -irmask 0x0f -expected-id $_CPUTAPID
39 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
40 target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
42 # FIX!!!!! should this really use srst_pulls_trst?
43 # With srst_pulls_trst "reset halt" will not reset into the
44 # halted mode, but rather "reset run" and then halt the target.
46 # However, without "srst_pulls_trst", then "reset halt" produces weird
48 # WARNING: unknown debug reason: 0x0
49 reset_config trst_and_srst
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