1 # script for stm32f1x family
4 # stm32 devices support both JTAG and SWD transports.
6 source [find target/swj-dp.tcl]
7 source [find mem_helper.tcl]
9 if { [info exists CHIPNAME] } {
10 set _CHIPNAME $CHIPNAME
12 set _CHIPNAME stm32f1x
17 # Work-area is a space in RAM used for flash programming
18 # By default use 4kB (as found on some STM32F100s)
19 if { [info exists WORKAREASIZE] } {
20 set _WORKAREASIZE $WORKAREASIZE
22 set _WORKAREASIZE 0x1000
26 if { [info exists CPUTAPID] } {
27 set _CPUTAPID $CPUTAPID
30 # See STM Document RM0008 Section 26.6.3
31 set _CPUTAPID 0x3ba00477
33 # this is the SW-DP tap id not the jtag tap id
34 set _CPUTAPID 0x1ba01477
38 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
40 if { [info exists BSTAPID] } {
41 # FIXME this never gets used to override defaults...
44 # See STM Document RM0008
46 # Low density devices, Rev A
47 set _BSTAPID1 0x06412041
48 # Medium density devices, Rev A
49 set _BSTAPID2 0x06410041
50 # Medium density devices, Rev B and Rev Z
51 set _BSTAPID3 0x16410041
52 set _BSTAPID4 0x06420041
53 # High density devices, Rev A
54 set _BSTAPID5 0x06414041
55 # Connectivity line devices, Rev A and Rev Z
56 set _BSTAPID6 0x06418041
57 # XL line devices, Rev A
58 set _BSTAPID7 0x06430041
59 # VL line devices, Rev A and Z In medium-density and high-density value line devices
60 set _BSTAPID8 0x06420041
61 # VL line devices, Rev A
62 set _BSTAPID9 0x06428041
66 swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
67 -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
68 -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
69 -expected-id $_BSTAPID6 -expected-id $_BSTAPID7 \
70 -expected-id $_BSTAPID8 -expected-id $_BSTAPID9
73 set _TARGETNAME $_CHIPNAME.cpu
74 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
76 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
78 # flash size will be probed
79 set _FLASHNAME $_CHIPNAME.flash
80 flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
82 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
85 adapter_nsrst_delay 100
90 reset_config srst_nogate
93 # if srst is not fitted use SYSRESETREQ to
94 # perform a soft reset
95 cortex_m reset_config sysresetreq
98 $_TARGETNAME configure -event examine-end {
99 # DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |
100 # DBG_STANDBY | DBG_STOP | DBG_SLEEP
101 mmw 0xE0042004 0x00000307 0
104 $_TARGETNAME configure -event trace-config {
105 # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
106 # change this value accordingly to configure trace pins
108 mmw 0xE0042004 0x00000020 0
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