Add OpenULINK driver files generated by SDCC to .gitignore
[openocd.git] / tcl / target / stm32f2xxx.cfg
1 # script for stm32f2xxx
2
3 if { [info exists CHIPNAME] } {
4 set _CHIPNAME $CHIPNAME
5 } else {
6 set _CHIPNAME stm32f2xxx
7 }
8
9 if { [info exists ENDIAN] } {
10 set _ENDIAN $ENDIAN
11 } else {
12 set _ENDIAN little
13 }
14
15 # Work-area is a space in RAM used for flash programming
16 # By default use 64kB
17 if { [info exists WORKAREASIZE] } {
18 set _WORKAREASIZE $WORKAREASIZE
19 } else {
20 set _WORKAREASIZE 0x10000
21 }
22
23 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
24 jtag_khz 1000
25
26 jtag_nsrst_delay 100
27 jtag_ntrst_delay 100
28
29 #jtag scan chain
30 if { [info exists CPUTAPID ] } {
31 set _CPUTAPID $CPUTAPID
32 } else {
33 # See STM Document RM0033
34 # Section 32.6.3 - corresponds to Cortex-M3 r2p0
35 set _CPUTAPID 0x4ba00477
36 }
37 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
38
39 if { [info exists BSTAPID ] } {
40 set _BSTAPID $BSTAPID
41 } else {
42 # See STM Document RM0033
43 # Section 32.6.2
44 #
45 set _BSTAPID 0x06411041
46 }
47 jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
48
49 set _TARGETNAME $_CHIPNAME.cpu
50 target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
51
52 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
53
54 set _FLASHNAME $_CHIPNAME.flash
55 flash bank $_FLASHNAME stm32f2xxx 0 0 0 0 $_TARGETNAME
56

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