4 # stm32 devices support both JTAG and SWD transports.
6 source [find target/swj-dp.tcl]
8 if { [info exists CHIPNAME] } {
9 set _CHIPNAME $CHIPNAME
14 if { [info exists ENDIAN] } {
20 # Work-area is a space in RAM used for flash programming
22 if { [info exists WORKAREASIZE] } {
23 set _WORKAREASIZE $WORKAREASIZE
25 set _WORKAREASIZE 0x2800
28 # JTAG speed should be <= F_CPU/6.
29 # F_CPU after reset is 2MHz, so use F_JTAG max = 333kHz
32 adapter_nsrst_delay 100
38 if { [info exists CPUTAPID] } {
39 set _CPUTAPID $CPUTAPID
42 # See STM Document RM0038
43 # Section 30.6.3 - corresponds to Cortex-M3 r2p0
44 set _CPUTAPID 0x4ba00477
46 set _CPUTAPID1 0x2ba01477
47 set _CPUTAPID2 0x0bc11477
52 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
54 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID1 -expected-id $_CPUTAPID2
57 if { [info exists BSTAPID] } {
58 # FIXME this never gets used to override defaults...
61 # See STM Document RM0038 Section 30.6.1
62 # (section 30.6.2 seems incorrect, at least in RM0038 DocID 15965 Rev 10)
64 # Low and medium density
65 set _BSTAPID1 0x06416041
66 # Cat.3 device (medium+ density)
67 set _BSTAPID2 0x06427041
68 # Cat.4 device, STM32L15/6xxD or Cat.3 device, some STM32L15/6xxC-A models
69 set _BSTAPID3 0x06436041
70 # Cat.5 device (high density), STM32L15/6xxE
71 set _BSTAPID4 0x06437041
75 swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 -expected-id $_BSTAPID4
78 set _TARGETNAME $_CHIPNAME.cpu
79 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
81 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
83 # flash size will be probed
84 set _FLASHNAME $_CHIPNAME.flash
85 flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
88 # if srst is not fitted use SYSRESETREQ to
89 # perform a soft reset
90 cortex_m reset_config sysresetreq
93 proc stm32l_enable_HSI {} {
94 # Enable HSI as clock source
95 echo "STM32L: Enabling HSI"
98 mww 0x40023800 0x00000101
101 mww 0x40023808 0x00000001
103 # Increase JTAG speed
107 $_TARGETNAME configure -event reset-init {
111 $_TARGETNAME configure -event reset-start {
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