tcl/target/u8500.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 #  Copyright (C) ST-Ericsson SA 2011
   4 #  Author : michel.jaouen@stericsson.com
   5 #  U8500 target
   6
   7 proc mmu_off {} {
   8         set cp [arm mrc 15 0 1 0 0]
   9         set cp [expr {$cp & ~1}]
  10         arm mcr 15 0 1 0 0 $cp
  11 }
  12
  13 proc mmu_on {} {
  14         set cp [arm mrc 15 0 1 0 0]
  15         set cp [expr {$cp | 1}]
  16         arm mcr 15 0 1 0 0 $cp
  17 }
  18
  19 proc ocd_gdb_restart {target_id} {
  20     global _TARGETNAME_1
  21         global _SMP
  22     targets $_TARGETNAME_1
  23         if { $_SMP == 1 } {
  24         cortex_a smp off
  25         }
  26         rst_run
  27         halt
  28         if { $_SMP == 1 } {
  29         cortex_a smp on
  30         }
  31 }
  32
  33 proc smp_reg {} {
  34         global _TARGETNAME_1
  35     global _TARGETNAME_2
  36     targets $_TARGETNAME_1
  37         echo "$_TARGETNAME_1"
  38         set pc1 [reg pc]
  39         set stck1 [reg sp_svc]
  40         targets $_TARGETNAME_2
  41         echo "$_TARGETNAME_1"
  42         set pc2 [reg pc]
  43         set stck2 [reg sp_svc]
  44 }
  45
  46
  47 proc u8500_tapenable {chip val} {
  48         echo "JTAG tap enable $chip"
  49 }
  50
  51
  52 proc pwrsts { } {
  53         global _CHIPNAME
  54         irscan $_CHIPNAME.jrc 0x3a
  55         drscan $_CHIPNAME.jrc 4 0
  56         set pwrsts [drscan $_CHIPNAME.jrc 16 0]
  57         echo "pwrsts ="$pwrsts
  58         set a9 [expr "0x$pwrsts & 0xc"]
  59         set ape [expr "0x$pwrsts & 0x3"]
  60         if {[string equal "0" $ape]} {
  61                 echo "ape off"
  62         } else {
  63                 echo "ape on"
  64         }
  65         echo "$a9"
  66         switch $a9 {
  67                 4 {
  68                         echo "A9 in retention"
  69                   }
  70                 8 {
  71                         echo "A9 100% DVFS"
  72                   }
  73                 c {
  74                         echo "A9 50% DVFS"
  75                 }
  76         }
  77 }
  78
  79 proc poll_pwrsts { } {
  80         global _CHIPNAME
  81         set result 1
  82         set i 0
  83         irscan $_CHIPNAME.jrc 0x3a
  84         drscan $_CHIPNAME.jrc 4 0
  85         set pwrsts [drscan $_CHIPNAME.jrc 16 0]
  86         set pwrsts [expr "0x$pwrsts & 0xc"]
  87         while {[string equal "4" $pwrsts] && $i<20} {
  88                 irscan $_CHIPNAME.jrc 0x3a
  89                 drscan $_CHIPNAME.jrc 4 0;
  90                 set pwrsts [drscan $_CHIPNAME.jrc 16 0]
  91                 set pwrsts [expr "0x$pwrsts & 0xc"]
  92                 if {![string equal "4" $pwrsts]} {
  93                         set result 1
  94                 } else {
  95                         set result 0
  96                         sleep 200
  97                         echo "loop $i"
  98                 }
  99                 incr i
 100         }
 101         return $result
 102 }
 103
 104 proc halt_ { } {
 105         if {[poll_pwrsts]==1} {
 106                 halt
 107         } else {
 108                 echo "halt failed : target in retention"
 109         }
 110 }
 111
 112
 113 proc u8500_dapenable {chip} {
 114 }
 115
 116 proc u8500_tapdisable {chip val} {
 117         echo "JTAG tap disable $chip"
 118 }
 119
 120
 121 proc enable_apetap {} {
 122         global _CHIPNAME
 123         global _TARGETNAME_2
 124     global _TARGETNAME_1
 125         poll off
 126         irscan $_CHIPNAME.jrc 0x3e
 127         drscan $_CHIPNAME.jrc 8 0xcf
 128         jtag tapenable $_CHIPNAME.dap
 129         irscan $_CHIPNAME.jrc 0x6
 130         drscan $_CHIPNAME.jrc 32 0
 131         irscan $_CHIPNAME.jrc 0x6
 132         drscan $_CHIPNAME.jrc 32 0
 133         set status [$_TARGETNAME_1 curstate]
 134     if {[string equal "unknown" $status]} {
 135         $_TARGETNAME_1 arp_examine
 136         cache_config l2x 0xa0412000 8
 137         }
 138
 139         set status [$_TARGETNAME_2 curstate]
 140     if {[string equal "unknown" $status]} {
 141         $_TARGETNAME_2 arp_examine
 142         }
 143         }
 144
 145 tcl_port 5555
 146 telnet_port 4444
 147 gdb_port 3333
 148
 149 if { [info exists CHIPNAME] } {
 150 global _CHIPNAME
 151     set _CHIPNAME $CHIPNAME
 152 } else {
 153 global _CHIPNAME
 154         set _CHIPNAME u8500
 155 }
 156
 157 if { [info exists ENDIAN] } {
 158         set _ENDIAN $ENDIAN
 159 } else {
 160  # this defaults to a bigendian
 161         set _ENDIAN little
 162 }
 163
 164
 165
 166 # Subsidiary TAP: APE with scan chains for ARM Debug, EmbeddedICE-RT,
 167 if { [info exists CPUTAPID] } {
 168    set _CPUTAPID $CPUTAPID
 169 } else {
 170         set _CPUTAPID 0x4ba00477
 171 }
 172 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xe -irmask 0xf -expected-id $_CPUTAPID -disable
 173 jtag configure $_CHIPNAME.cpu -event tap-enable \
 174         "u8500_dapenable $_CHIPNAME.cpu"
 175 jtag configure $_CHIPNAME.cpu -event tap-disable \
 176         "u8500_tapdisable $_CHIPNAME.cpu 0xc0"
 177
 178
 179 #CLTAPC TAP JRC equivalent
 180 if { [info exists CLTAPC_ID] } {
 181    set _CLTAPC_ID $CLTAPC_ID
 182 } else {
 183    set _CLTAPC_ID 0x22286041
 184 }
 185 jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x6 -irmask 0xf -expected-id $_CLTAPC_ID -ignore-version
 186
 187
 188 if { ![info exists TARGETNAME_1] } {
 189 global _TARGETNAME_1
 190 set _TARGETNAME_1 $_CHIPNAME.cpu1
 191 } else {
 192 global _TARGETNAME_1
 193 set _TARGETNAME_1 $TARGETNAME_1
 194 }
 195
 196 if { [info exists DAP_DBG1] } {
 197         set _DAP_DBG1 $DAP_DBG1
 198 } else {
 199         set _DAP_DBG1 0x801A8000
 200 }
 201 if { [info exists DAP_DBG2] } {
 202         set _DAP_DBG2 $DAP_DBG2
 203 } else {
 204         set _DAP_DBG2 0x801AA000
 205 }
 206
 207 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 208
 209 target create $_TARGETNAME_1 cortex_a -dap $_CHIPNAME.dap -dbgbase $_DAP_DBG1 -coreid 0 -rtos linux
 210
 211
 212 if { ![info exists TARGETNAME_2] } {
 213 global _TARGETNAME_2
 214 set _TARGETNAME_2 $_CHIPNAME.cpu2
 215 } else {
 216 global _TARGETNAME_2
 217 set _TARGETNAME_2 $TARGETNAME_2
 218 }
 219
 220 target create $_TARGETNAME_2 cortex_a -dap $_CHIPNAME.dap -dbgbase $_DAP_DBG2 -coreid 1 -rtos linux
 221
 222
 223 if {![info exists SMP]} {
 224 global _SMP
 225 set _SMP 1
 226 } else {
 227 global _SMP
 228 set _SMP $SMP
 229 }
 230 global SMP
 231 if { $_SMP == 1} {
 232 target smp $_CHIPNAME.cpu2 $_CHIPNAME.cpu1
 233 }
 234
 235
 236
 237
 238 proc secsts1 { } {
 239         global _CHIPNAME
 240         irscan $_CHIPNAME.jrc 0x3a
 241                 drscan $_CHIPNAME.jrc 4 4
 242         set secsts1 [drscan $_CHIPNAME.jrc 16 0]
 243         echo "secsts1 ="$secsts1
 244         set secsts1 [expr "0x$secsts1 & 0x4"]
 245         if {![string equal "4" $secsts1]} {
 246         echo "APE target secured"
 247         } else {
 248         echo "APE target not secured"
 249         }
 250 }
 251
 252 proc att { } {
 253         global _CHIPNAME
 254         jtag arp_init
 255         irscan $_CHIPNAME.jrc 0x3a
 256         drscan $_CHIPNAME.jrc 4 4
 257         set secsts1 [drscan $_CHIPNAME.jrc 16 0]
 258         echo "secsts1 ="$secsts1
 259         set secsts1 [expr "0x$secsts1 & 0x4"]
 260         if {[string equal "4" $secsts1]} {
 261                 if {[poll_pwrsts]==1} {
 262                 enable_apetap
 263                 } else {
 264                 echo "target in retention"
 265                 }
 266         } else {
 267                 echo "target secured"
 268         }
 269
 270 }
 271
 272
 273
 274 proc rst_run { } {
 275         global _CHIPNAME
 276         global _TARGETNAME_2
 277         global _TARGETNAME_1
 278         set status [$_TARGETNAME_1 curstate]
 279         if {[string equal "halted" $status]} {
 280         resume
 281         targets $_TARGETNAME_1
 282         }
 283     set status [$_TARGETNAME_2 curstate]
 284         if {[string equal "halted" $status]} {
 285         resume
 286         targets $_TARGETNAME_2
 287         }
 288         poll off
 289         jtag arp_init
 290         reset
 291         sleep 20
 292         irscan $_CHIPNAME.jrc 0x3a
 293         drscan $_CHIPNAME.jrc 4 4
 294         set secsts1 [drscan $_CHIPNAME.jrc 16 0]
 295         echo "secsts1 ="$secsts1
 296         set secsts1 [expr "0x$secsts1 & 0x4"]
 297         while {![string equal "4" $secsts1]} {
 298                 irscan u8500.jrc 0x3a
 299                 drscan u8500.jrc 4 4
 300                 set secsts1 [drscan $_CHIPNAME.jrc 16 0]
 301                 echo "secsts1 ="$secsts1
 302                 set secsts1 [expr "0x$secsts1 & 0x4"]
 303         }
 304         echo "ape debugable"
 305         enable_apetap
 306         poll on
 307         targets $_TARGETNAME_1
 308         dap apsel 1
 309 }
 310
 311 if {![info exists MAXSPEED]} {
 312 global _MAXSPEED
 313 set _MAXSPEED 15000
 314 } else {
 315 global _MAXSPEED
 316 set _MAXSPEED $MAXSPEED
 317 }
 318 global _MAXSPEED
 319 adapter speed $_MAXSPEED
 320
 321
 322 gdb_breakpoint_override hard
 323 set mem inaccessible-by-default-off
 324
 325 jtag_ntrst_delay 100
 326 reset_config trst_and_srst combined