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Changed armv7m and cortexm3 to use nev arm_adi_v5 instead of cortex_swjdp.
[openocd.git] / src / target / armv7m.c
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 6dc224f90048b10262a90ea46a1ef6c6cedf4f17..d6bed358f345d9e9d51ade1750d6e32321b296e9 100644 (file)
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -297,6 +297,41 @@ int armv7m_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_
        return ERROR_OK;
 }
 
+/* run to exit point. return error if exit point was not reached. */
+static int armv7m_run_and_wait(struct target_s *target, u32 entry_point, int timeout_ms, u32 exit_point, armv7m_common_t *armv7m)
+{
+       u32 pc;
+       int retval;
+       /* This code relies on the target specific  resume() and  poll()->debug_entry()
+        * sequence to write register values to the processor and the read them back */
+       if((retval = target_resume(target, 0, entry_point, 1, 1)) != ERROR_OK)
+       {
+               return retval;
+       }
+
+       retval = target_wait_state(target, TARGET_HALTED, timeout_ms);
+       /* If the target fails to halt due to the breakpoint, force a halt */
+       if (retval != ERROR_OK || target->state != TARGET_HALTED)
+       {
+               if ((retval=target_halt(target))!=ERROR_OK)
+                       return retval;
+               if ((retval=target_wait_state(target, TARGET_HALTED, 500))!=ERROR_OK)
+               {
+                       return retval;
+               }
+               return ERROR_TARGET_TIMEOUT;
+       }
+
+       armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc);
+       if (pc != exit_point)
+       {
+               LOG_DEBUG("failed algoritm halted at 0x%x ", pc);
+               return ERROR_TARGET_TIMEOUT;
+       }
+
+       return ERROR_OK;
+}
+
 int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info)
 {
        /* get pointers to arch-specific information */
@@ -304,7 +339,6 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
        armv7m_algorithm_t *armv7m_algorithm_info = arch_info;
        enum armv7m_mode core_mode = armv7m->core_mode;
        int retval = ERROR_OK;
-       u32 pc;
        int i;
        u32 context[ARMV7NUMCOREREGS];
 
@@ -331,7 +365,8 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
 
        for (i = 0; i < num_mem_params; i++)
        {
-               target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value);
+               if ((retval=target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value))!=ERROR_OK)
+                       return retval;
        }
 
        for (i = 0; i < num_reg_params; i++)
@@ -370,42 +405,15 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
                return ERROR_TARGET_FAILURE;
        }
 
-       /* This code relies on the target specific  resume() and  poll()->debug_entry()
-       sequence to write register values to the processor and the read them back */
-       if((retval = target_resume(target, 0, entry_point, 1, 1)) != ERROR_OK)
-       {
-               return retval;
-       }
-       if((retval = target_poll(target)) != ERROR_OK)
-       {
-               return retval;
-       }
-
-       if((retval = target_wait_state(target, TARGET_HALTED, timeout_ms)) != ERROR_OK)
-       {
-               return retval;
-       }
-       if (target->state != TARGET_HALTED)
-       {
-               if ((retval=target_halt(target))!=ERROR_OK)
-                       return retval;
-               if ((retval=target_wait_state(target, TARGET_HALTED, 500))!=ERROR_OK)
-               {
-                       return retval;
-               }
-               return ERROR_TARGET_TIMEOUT;
-       }
+       retval = armv7m_run_and_wait(target, entry_point, timeout_ms, exit_point, armv7m);
 
+       breakpoint_remove(target, exit_point);
 
-       armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc);
-       if (pc != exit_point)
+       if (retval != ERROR_OK)
        {
-               LOG_DEBUG("failed algoritm halted at 0x%x ", pc);
-               return ERROR_TARGET_TIMEOUT;
+               return retval;
        }
 
-       breakpoint_remove(target, exit_point);
-
        /* Read memory values to mem_params[] */
        for (i = 0; i < num_mem_params; i++)
        {
@@ -441,10 +449,15 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
 
        for (i = ARMV7NUMCOREREGS-1; i >= 0; i--)
        {
-               LOG_DEBUG("restoring register %s with value 0x%8.8x", armv7m->core_cache->reg_list[i].name, context[i]);
-               buf_set_u32(armv7m->core_cache->reg_list[i].value, 0, 32, context[i]);
-               armv7m->core_cache->reg_list[i].valid = 1;
-               armv7m->core_cache->reg_list[i].dirty = 1;
+               u32 regvalue;
+               regvalue = buf_get_u32(armv7m->core_cache->reg_list[i].value, 0, 32);
+               if (regvalue != context[i])
+               {
+                       LOG_DEBUG("restoring register %s with value 0x%8.8x", armv7m->core_cache->reg_list[i].name, context[i]);
+                       buf_set_u32(armv7m->core_cache->reg_list[i].value, 0, 32, context[i]);
+                       armv7m->core_cache->reg_list[i].valid = 1;
+                       armv7m->core_cache->reg_list[i].dirty = 1;
+               }
        }
 
        armv7m->core_mode = core_mode;
@@ -537,6 +550,12 @@ int armv7m_init_arch_info(target_t *target, armv7m_common_t *armv7m)
 
 int armv7m_register_commands(struct command_context_s *cmd_ctx)
 {
+       command_t *arm_adi_v5_dap_cmd;
+
+       arm_adi_v5_dap_cmd = register_command(cmd_ctx, NULL, "dap", NULL, COMMAND_ANY, "cortex dap specific commands");         
+       register_command(cmd_ctx, arm_adi_v5_dap_cmd, "info", handle_dap_info_command, COMMAND_EXEC, "dap info for ap [num] (default 0)");
+       register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apsel", handle_dap_apsel_command, COMMAND_EXEC, "select a different AP [num] (default 0)");
+
        return ERROR_OK;
 }
 
@@ -578,7 +597,7 @@ int armv7m_checksum_memory(struct target_s *target, u32 address, u32 count, u32*
                0x1DB7, 0x04C1                  /* CRC32XOR:    .word 0x04C11DB7 */
        };
 
-       int i;
+       u32 i;
 
        if (target_alloc_working_area(target, sizeof(cortex_m3_crc_code), &crc_algorithm) != ERROR_OK)
        {
@@ -627,17 +646,17 @@ int armv7m_blank_check_memory(struct target_s *target, u32 address, u32 count, u
        reg_param_t reg_params[3];
        armv7m_algorithm_t armv7m_info;
        int retval;
-       int i;
+       u32 i;
 
        u16 erase_check_code[] =
        {
                                                        /* loop: */
-                0xF810, 0x3B01,        /* ldrb         r3, [r0], #1 */
-                0xEA02, 0x0203,        /* and  r2, r2, r3 */
-                0x3901,                        /* subs         r1, r1, #1 */
-                0xD1F9,                        /* bne          loop */
-                                                       /* end: */
-                0xE7FE,                        /* b            end */
+               0xF810, 0x3B01,         /* ldrb         r3, [r0], #1 */
+               0xEA02, 0x0203,         /* and  r2, r2, r3 */
+               0x3901,                         /* subs         r1, r1, #1 */
+               0xD1F9,                         /* bne          loop */
+                                                       /* end: */
+               0xE7FE,                         /* b            end */
        };
 
        /* make sure we have a working area */
@@ -682,3 +701,45 @@ int armv7m_blank_check_memory(struct target_s *target, u32 address, u32 count, u
 
        return ERROR_OK;
 }
+
+int handle_dap_apsel_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+{
+       target_t *target = get_current_target(cmd_ctx);
+       armv7m_common_t *armv7m = target->arch_info;
+       swjdp_common_t *swjdp = &armv7m->swjdp_info;
+       u32 apsel, apid;
+       int retval;
+
+       apsel = 0;
+       if (argc > 0)
+       {       
+               apsel = strtoul(args[0], NULL, 0);
+       }
+
+       dap_ap_select(swjdp, apsel);
+       dap_ap_read_reg_u32(swjdp, 0xFC, &apid);
+       retval = swjdp_transaction_endcheck(swjdp);
+       command_print(cmd_ctx, "ap %i selected, identification register 0x%8.8x", apsel, apid);
+
+       return retval;
+}
+
+int handle_dap_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+{
+       target_t *target = get_current_target(cmd_ctx);
+       armv7m_common_t *armv7m = target->arch_info;
+       swjdp_common_t *swjdp = &armv7m->swjdp_info;
+       int retval;
+       u32 apsel;
+
+       apsel = 0;
+       if (argc > 0)
+       {       
+               apsel = strtoul(args[0], NULL, 0);
+       }
+       
+       retval = dap_info_command(cmd_ctx, swjdp, apsel);
+
+       return retval;
+}
+
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