- jtag_khz/speed are now single parameter only. These are used

[openocd.git] / src / target / cortex_m3.h

diff --git a/src/target/cortex_m3.h b/src/target/cortex_m3.h
index 63a5c43b19ce9357cd2e125ff1491c1dff0d3435..0d4678e83d2434f1549b233fd18c6d6baf35b1ba 100644 (file)
--- a/src/target/cortex_m3.h
+++ b/src/target/cortex_m3.h
@@ -1,6 +1,7 @@
 /***************************************************************************
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
+ *                                                                         *
  *   Copyright (C) 2006 by Magnus Lundin                                   *
  *   lundin@mlu.mine.nu                                                    *
  *                                                                         *
@@ -40,7 +41,6 @@ extern char* cortex_m3_state_strings[];
 #define DCB_DCRDR      0xE000EDF8
 #define DCB_DEMCR      0xE000EDFC
 
-
 #define DCRSR_WnR      (1<<16) 
 
 #define DWT_CTRL       0xE0001000
@@ -102,11 +102,10 @@ extern char* cortex_m3_state_strings[];
 /* NVIC_SHCSR bits */
 #define SHCSR_BUSFAULTENA      (1<<17)
 /* NVIC_DFSR bits */
-#define DFSR_HALTED    1
-#define DFSR_BKPT      2
-#define DFSR_DWTTRAP   4
-#define DFSR_VCATCH    8
-
+#define DFSR_HALTED                    1
+#define DFSR_BKPT                      2
+#define DFSR_DWTTRAP           4
+#define DFSR_VCATCH                    8
 
 #define FPCR_CODE 0
 #define FPCR_LITERAL 1
@@ -135,9 +134,8 @@ typedef struct  cortex_m3_dwt_comparator_s
 typedef struct cortex_m3_common_s
 {
        int common_magic;
-//     int (*full_context)(struct target_s *target);
-
        arm_jtag_t jtag_info;
+       char *variant;
        
        /* Context information */
        u32 dcb_dhcsr;
@@ -149,50 +147,25 @@ typedef struct cortex_m3_common_s
        int fp_num_code;
        int fp_code_available;
        int auto_bp_type;
-       cortex_m3_fp_comparator_t * fp_comparator_list;
+       cortex_m3_fp_comparator_t *fp_comparator_list;
        
        /* DWT */
        int dwt_num_comp;
        int dwt_comp_available;
-       cortex_m3_dwt_comparator_t * dwt_comparator_list;
+       cortex_m3_dwt_comparator_t *dwt_comparator_list;
        
        /* Interrupts */
        int intlinesnum;
-       u32 * intsetenable;
-       
-/*
-       u32 arm_bkpt;
-       u16 thumb_bkpt;
-       int sw_bkpts_use_wp;
-       int wp_available;
-       int wp0_used;
-       int wp1_used;
-       
-       int force_hw_bkpts;
-       int dbgreq_adjust_pc;
-       int use_dbgrq;
-       int has_etm;
+       u32 *intsetenable;
        
-       int reinit_embeddedice;
-       
-       struct working_area_s *dcc_working_area;
-       
-       int fast_memory_access;
-       int dcc_downloads;
-*/
-       /* breakpoint use map */
-       int sw_bkpts_enabled;
-
        armv7m_common_t armv7m;
        swjdp_common_t swjdp_info;
-       
        void *arch_info;
 } cortex_m3_common_t;
 
-
 extern void cortex_m3_build_reg_cache(target_t *target);
 
-enum target_state cortex_m3_poll(target_t *target);
+int cortex_m3_poll(target_t *target);
 int cortex_m3_halt(target_t *target);
 int cortex_m3_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
 int cortex_m3_step(struct target_s *target, int current, u32 address, int handle_breakpoints);