STM32H72x/73x flash is similar to STM32H74x/75x,
except STM32H72x/73x devices have only one single flash bank.
Change-Id: I3d3422dc60234f8273172924f426200210f388cc
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5792
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
-static uint32_t stm32x_compute_flash_cr_450(uint32_t cmd, int snb)
+static const struct stm32h7x_rev stm32_483_revs[] = {
+ { 0x1000, "A" }, { 0x1001, "Z" },
+};
+
+static uint32_t stm32x_compute_flash_cr_450_483(uint32_t cmd, int snb)
{
return cmd | (snb << 8);
}
{
return cmd | (snb << 8);
}
.fsize_addr = 0x1FF1E880,
.wps_group_size = 1,
.wps_mask = 0xFF,
.fsize_addr = 0x1FF1E880,
.wps_group_size = 1,
.wps_mask = 0xFF,
- .compute_flash_cr = stm32x_compute_flash_cr_450,
+ .compute_flash_cr = stm32x_compute_flash_cr_450_483,
.wps_mask = 0xFFFFFFFF,
.compute_flash_cr = stm32x_compute_flash_cr_480,
},
.wps_mask = 0xFFFFFFFF,
.compute_flash_cr = stm32x_compute_flash_cr_480,
},
+ {
+ .id = 0x483,
+ .revs = stm32_483_revs,
+ .num_revs = ARRAY_SIZE(stm32_483_revs),
+ .device_str = "STM32H72x/73x",
+ .page_size_kb = 128,
+ .block_size = 32,
+ .max_flash_size_kb = 1024,
+ .max_bank_size_kb = 1024,
+ .has_dual_bank = false,
+ .fsize_addr = 0x1FF1E880,
+ .wps_group_size = 1,
+ .wps_mask = 0xFF,
+ .compute_flash_cr = stm32x_compute_flash_cr_450_483,
+ },
};
/* flash bank stm32x <base> <size> 0 0 <target#> */
};
/* flash bank stm32x <base> <size> 0 0 <target#> */
/* flash size is 2M or 1M */
flash_size_in_kb /= 2;
break;
/* flash size is 2M or 1M */
flash_size_in_kb /= 2;
break;
default:
LOG_ERROR("unsupported device");
return ERROR_FAIL;
default:
LOG_ERROR("unsupported device");
return ERROR_FAIL;
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