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536ca77)
SPAS register (OOB size) is left wrong after reset with respect to 2KiB page NAND chip. That will lead to ECC errors after 'reset halt'.
Change-Id: If5a4685cb8d6be35879453951611ef1059da219c
Signed-off-by: Timo Ketola <timo@exertus.fi>
Reviewed-on: http://openocd.zylin.com/384
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
* !! all function only tested with 2k page nand device; mxc_write_page
* writes the 4 MAIN_BUFFER's and is not compatible with < 2k page
* !! oob must be be used due to NFS bug
* !! all function only tested with 2k page nand device; mxc_write_page
* writes the 4 MAIN_BUFFER's and is not compatible with < 2k page
* !! oob must be be used due to NFS bug
+ * !! oob must be 64 bytes per 2KiB page
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#include "mxc.h"
#include <target/target.h>
#include "mxc.h"
#include <target/target.h>
#define nfc_is_v1() (mxc_nf_info->mxc_version == MXC_VERSION_MX27 || \
mxc_nf_info->mxc_version == MXC_VERSION_MX31)
#define nfc_is_v2() (mxc_nf_info->mxc_version == MXC_VERSION_MX25 || \
#define nfc_is_v1() (mxc_nf_info->mxc_version == MXC_VERSION_MX27 || \
mxc_nf_info->mxc_version == MXC_VERSION_MX31)
#define nfc_is_v2() (mxc_nf_info->mxc_version == MXC_VERSION_MX25 || \
LOG_DEBUG("MXC_NF : work without ECC mode");
}
if (nfc_is_v2()) {
LOG_DEBUG("MXC_NF : work without ECC mode");
}
if (nfc_is_v2()) {
+ target_write_u16(target, MXC_NF_V2_SPAS, OOB_SIZE / 2);
if (nand->page_size) {
uint16_t pages_per_block = nand->erase_size / nand->page_size;
work_mode |= MXC_NF_V2_CFG1_PPB(ffs(pages_per_block) - 6);
if (nand->page_size) {
uint16_t pages_per_block = nand->erase_size / nand->page_size;
work_mode |= MXC_NF_V2_CFG1_PPB(ffs(pages_per_block) - 6);
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