ARM: rename armv4_5_build_reg_cache() as arm_*()

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index a0b12b94ae2b65587cafb1121b0ec8d479eca85d..fffc6327ec7c3e061be91b0bf4a3ab1db0a3112e 100644 (file)
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -643,7 +643,7 @@ static void arm7tdmi_build_reg_cache(struct target *target)
        struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
        struct arm *armv4_5 = target_to_arm(target);
 
-       (*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
+       (*cache_p) = arm_build_reg_cache(target, armv4_5);
 }
 
 int arm7tdmi_init_target(struct command_context *cmd_ctx, struct target *target)

diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index 10f88f7714901701d3d9c8b686f2a20953e7883f..09199c70f5fab4d7bda822d5d05be0e598905d66 100644 (file)
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -753,7 +753,7 @@ static void arm9tdmi_build_reg_cache(struct target *target)
        struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
        struct arm *armv4_5 = target_to_arm(target);
 
-       (*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
+       (*cache_p) = arm_build_reg_cache(target, armv4_5);
 }
 
 int arm9tdmi_init_target(struct command_context *cmd_ctx,

diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c
index b65e922f6ebc016bb61f33ce8421d38740423078..ff89c47653b1f0b6b53fdd659439e90a6d064476 100644 (file)
--- a/src/target/arm_dpm.c
+++ b/src/target/arm_dpm.c
@@ -819,7 +819,7 @@ int arm_dpm_setup(struct arm_dpm *dpm)
        arm->read_core_reg = arm_dpm_read_core_reg;
        arm->write_core_reg = arm_dpm_write_core_reg;
 
-       cache = armv4_5_build_reg_cache(target, arm);
+       cache = arm_build_reg_cache(target, arm);
        if (!cache)
                return ERROR_FAIL;
 

diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index e07f60670112c21edc2c5fa02bb306e879c64d00..ad89b2f8b0bd97b8bd538912a80ffe277170f2c5 100644 (file)
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -533,7 +533,7 @@ static const struct reg_arch_type arm_reg_type = {
        .set = armv4_5_set_core_reg,
 };
 
-struct reg_cache* armv4_5_build_reg_cache(struct target *target, struct arm *armv4_5_common)
+struct reg_cache *arm_build_reg_cache(struct target *target, struct arm *arm)
 {
        int num_regs = ARRAY_SIZE(arm_core_regs);
        struct reg_cache *cache = malloc(sizeof(struct reg_cache));
@@ -557,7 +557,7 @@ struct reg_cache* armv4_5_build_reg_cache(struct target *target, struct arm *arm
        {
                /* Skip registers this core doesn't expose */
                if (arm_core_regs[i].mode == ARM_MODE_MON
-                               && armv4_5_common->core_type != ARM_MODE_MON)
+                               && arm->core_type != ARM_MODE_MON)
                        continue;
 
                /* REVISIT handle Cortex-M, which only shadows R13/SP */
@@ -565,7 +565,7 @@ struct reg_cache* armv4_5_build_reg_cache(struct target *target, struct arm *arm
                arch_info[i].num = arm_core_regs[i].cookie;
                arch_info[i].mode = arm_core_regs[i].mode;
                arch_info[i].target = target;
-               arch_info[i].armv4_5_common = armv4_5_common;
+               arch_info[i].armv4_5_common = arm;
 
                reg_list[i].name = (char *) arm_core_regs[i].name;
                reg_list[i].size = 32;
@@ -576,8 +576,8 @@ struct reg_cache* armv4_5_build_reg_cache(struct target *target, struct arm *arm
                cache->num_regs++;
        }
 
-       armv4_5_common->cpsr = reg_list + ARMV4_5_CPSR;
-       armv4_5_common->core_cache = cache;
+       arm->cpsr = reg_list + ARMV4_5_CPSR;
+       arm->core_cache = cache;
        return cache;
 }
 

diff --git a/src/target/armv4_5.h b/src/target/armv4_5.h
index 0b28301332673c147f707dcd816400357a74c2eb..56461e7e3080443f8c6a88a2570332dfbe36d4d2 100644 (file)
--- a/src/target/armv4_5.h
+++ b/src/target/armv4_5.h
@@ -177,8 +177,7 @@ struct arm_reg
        uint32_t value;
 };
 
-struct reg_cache* armv4_5_build_reg_cache(struct target *target,
-               struct arm *armv4_5_common);
+struct reg_cache *arm_build_reg_cache(struct target *target, struct arm *arm);
 
 int armv4_5_arch_state(struct target *target);
 int armv4_5_get_gdb_reg_list(struct target *target,

diff --git a/src/target/xscale.c b/src/target/xscale.c
index 352e1593edb901c95be1dd3dea34e3517d7eef4f..d5b1d636b63ee713871fc531705b734232fb84d8 100644 (file)
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -2859,7 +2859,7 @@ static void xscale_build_reg_cache(struct target *target)
        int i;
        int num_regs = ARRAY_SIZE(xscale_reg_arch_info);
 
-       (*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
+       (*cache_p) = arm_build_reg_cache(target, armv4_5);
 
        (*cache_p)->next = malloc(sizeof(struct reg_cache));
        cache_p = &(*cache_p)->next;