target/arm_dpm: rename 'wp_pc' as 'wp_addr' 04/6204/3
authorAntonio Borneo <borneo.antonio@gmail.com>
Wed, 5 May 2021 10:27:11 +0000 (12:27 +0200)
committerAntonio Borneo <borneo.antonio@gmail.com>
Sat, 22 May 2021 09:04:12 +0000 (10:04 +0100)
The field 'wp_pc' was originally introduced in commit 55eeea7fceb6
("ARMv7a/Cortex-A8: report watchpoint trigger insn") in end 2009
to contain the address of the instruction which triggered a
watchpoint. Later on with commit 651b861d5d5f ("target/aarch64:
Add watchpoint support") it has been reused in to hold directly
the memory address that triggered a watchpoint.

Rename 'wp_pc' as 'wp_addr' and change its doxygen description.
While there, fix the format string to print the field.

Change-Id: I2e5ced1497e4a6fb6b38f91e881807512e8d8c47
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6204
Tested-by: jenkins
Reviewed-by: Liming Sun <limings@nvidia.com>
src/target/aarch64.c
src/target/arm11.c
src/target/arm_dpm.c
src/target/arm_dpm.h
src/target/armv7a.c
src/target/armv8.c
src/target/armv8_dpm.c

index 4ba92c8a0edf86403c301612687173ed76fda50e..e6eb2cafd0e5f2be46cb56f20f21099747bb553f 100644 (file)
@@ -1856,7 +1856,7 @@ int aarch64_hit_watchpoint(struct target *target,
        uint64_t exception_address;
        struct watchpoint *wp;
 
-       exception_address = armv8->dpm.wp_pc;
+       exception_address = armv8->dpm.wp_addr;
 
        if (exception_address == 0xFFFFFFFF)
                return ERROR_FAIL;
@@ -1867,12 +1867,12 @@ int aarch64_hit_watchpoint(struct target *target,
        /* the EDWAR value needs to have 8 added to it so we add  */
        /* that check as well not sure if that is a core bug)     */
        /**********************************************************/
-       for (exception_address = armv8->dpm.wp_pc; exception_address <= (armv8->dpm.wp_pc + 8);
+       for (exception_address = armv8->dpm.wp_addr; exception_address <= (armv8->dpm.wp_addr + 8);
                exception_address += 8) {
                for (wp = target->watchpoints; wp; wp = wp->next) {
                        if ((exception_address >= wp->address) && (exception_address < (wp->address + wp->length))) {
                                *hit_watchpoint = wp;
-                               if (exception_address != armv8->dpm.wp_pc)
+                               if (exception_address != armv8->dpm.wp_addr)
                                        LOG_DEBUG("watchpoint hit required EDWAR to be increased by 8");
                                return ERROR_OK;
                        }
index 68d4e18944324e076053ce0b2e35005873c5ef77..ff125d0eaa956da1b36859e729f04e947da6f625 100644 (file)
@@ -355,8 +355,7 @@ static int arm11_arch_state(struct target *target)
        /* REVISIT also display ARM11-specific MMU and cache status ... */
 
        if (target->debug_reason == DBG_REASON_WATCHPOINT)
-               LOG_USER("Watchpoint triggered at PC %#08x",
-                       (unsigned) arm11->dpm.wp_pc);
+               LOG_USER("Watchpoint triggered at PC " TARGET_ADDR_FMT, arm11->dpm.wp_addr);
 
        return retval;
 }
index 6bfe355ba2e0ed50ea40c687b77dba32f802c8fe..e172fad370da7abf954beb6792189fbf8b13bc84 100644 (file)
@@ -1010,7 +1010,7 @@ void arm_dpm_report_wfar(struct arm_dpm *dpm, uint32_t addr)
                        /* ?? */
                        break;
        }
-       dpm->wp_pc = addr;
+       dpm->wp_addr = addr;
 }
 
 /*----------------------------------------------------------------------*/
index 82707822b1f90cf576533568305ebf98ba1d2584..80587f5fe127ae2078d8de8a92e9b3843627d2ae 100644 (file)
@@ -137,8 +137,12 @@ struct arm_dpm {
        struct dpm_bp *dbp;
        struct dpm_wp *dwp;
 
-       /** Address of the instruction which triggered a watchpoint. */
-       target_addr_t wp_pc;
+       /**
+        * Target dependent watchpoint address.
+        * Either the address of the instruction which triggered a watchpoint
+        * or the memory address whose access triggered a watchpoint.
+        */
+       target_addr_t wp_addr;
 
        /** Recent value of DSCR. */
        uint32_t dscr;
index abca3358f383e96889687d280c3f8f30be6f72df..5c9f3085c35a33bfa9e7dc77ba963e7e8ed2c109 100644 (file)
@@ -571,8 +571,7 @@ int armv7a_arch_state(struct target *target)
        if (arm->core_mode == ARM_MODE_ABT)
                armv7a_show_fault_registers(target);
        if (target->debug_reason == DBG_REASON_WATCHPOINT)
-               LOG_USER("Watchpoint triggered at PC %#08x",
-                       (unsigned) armv7a->dpm.wp_pc);
+               LOG_USER("Watchpoint triggered at PC " TARGET_ADDR_FMT, armv7a->dpm.wp_addr);
 
        return ERROR_OK;
 }
index 6bf3b110daac3196e30c180957236d3d4bb5aa8d..e209e8896a0a5108d36d03b954143453b4376e1a 100644 (file)
@@ -1169,8 +1169,7 @@ int armv8_arch_state(struct target *target)
                armv8_show_fault_registers(target);
 
        if (target->debug_reason == DBG_REASON_WATCHPOINT)
-               LOG_USER("Watchpoint triggered at PC %#08x",
-                       (unsigned) armv8->dpm.wp_pc);
+               LOG_USER("Watchpoint triggered at PC " TARGET_ADDR_FMT, armv8->dpm.wp_addr);
 
        return ERROR_OK;
 }
index e7d0f864e81aba2fccab5c33337c8fbbd0d7a567..a7b4f1d386c039cd73ec3260b856fe8250c8bdfc 100644 (file)
@@ -1297,7 +1297,7 @@ void armv8_dpm_report_wfar(struct arm_dpm *dpm, uint64_t addr)
                        LOG_DEBUG("Unknown core_state");
                        break;
        }
-       dpm->wp_pc = addr;
+       dpm->wp_addr = addr;
 }
 
 /*

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