This adds a trivial config for LPC8xx chips based on the already
existing infrastructure in lpc1xxx.cfg.
Change-Id: I7384df1f3c2e3e8ab767319728db5c4f8149480f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2464
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
+# LPC8xx chips support only SWD transport.
# LPC11xx chips support only SWD transport.
# LPC12xx chips support only SWD transport.
# LPC11Uxx chips support both JTAG and SWD transports.
# LPC11xx chips support only SWD transport.
# LPC12xx chips support only SWD transport.
# LPC11Uxx chips support both JTAG and SWD transports.
if { [info exists CHIPSERIES] } {
# Validate chip series is supported
if { [info exists CHIPSERIES] } {
# Validate chip series is supported
- if { $CHIPSERIES != "lpc1100" && $CHIPSERIES != "lpc1200" && $CHIPSERIES != "lpc1300" && $CHIPSERIES != "lpc1700" } {
+ if { $CHIPSERIES != "lpc800" && $CHIPSERIES != "lpc1100" && $CHIPSERIES != "lpc1200" && $CHIPSERIES != "lpc1300" && $CHIPSERIES != "lpc1700" } {
error "Unsupported LPC1xxx chip series specified."
}
set _CHIPSERIES $CHIPSERIES
error "Unsupported LPC1xxx chip series specified."
}
set _CHIPSERIES $CHIPSERIES
# Allow user override
set _CCLK $CCLK
} else {
# Allow user override
set _CCLK $CCLK
} else {
- # LPC11xx/LPC12xx/LPC13xx use a 12MHz one, LPC17xx uses a 4MHz one
- if { $_CHIPSERIES == "lpc1100" || $_CHIPSERIES == "lpc1200" || $_CHIPSERIES == "lpc1300" } {
+ # LPC8xx/LPC11xx/LPC12xx/LPC13xx use a 12MHz one, LPC17xx uses a 4MHz one
+ if { $_CHIPSERIES == "lpc800" || $_CHIPSERIES == "lpc1100" || $_CHIPSERIES == "lpc1200" || $_CHIPSERIES == "lpc1300" } {
set _CCLK 12000
} elseif { $_CHIPSERIES == "lpc1700" } {
set _CCLK 4000
set _CCLK 12000
} elseif { $_CHIPSERIES == "lpc1700" } {
set _CCLK 4000
# Allow user override
set _CPUTAPID $CPUTAPID
} else {
# Allow user override
set _CPUTAPID $CPUTAPID
} else {
- # LPC11xx/LPC12xx uses a Cortex M0 core, LPC13xx/LPC17xx use a Cortex M3 core
- if { $_CHIPSERIES == "lpc1100" || $_CHIPSERIES == "lpc1200" } {
+ # LPC8xx/LPC11xx/LPC12xx use a Cortex M0/M0+ core, LPC13xx/LPC17xx use a Cortex M3 core
+ if { $_CHIPSERIES == "lpc800" || $_CHIPSERIES == "lpc1100" || $_CHIPSERIES == "lpc1200" } {
set _CPUTAPID 0x0bb11477
} elseif { $_CHIPSERIES == "lpc1300" || $_CHIPSERIES == "lpc1700" } {
if { [using_jtag] } {
set _CPUTAPID 0x0bb11477
} elseif { $_CHIPSERIES == "lpc1300" || $_CHIPSERIES == "lpc1700" } {
if { [using_jtag] } {
flash bank $_FLASHNAME lpc2000 0x0 0 0 0 $_TARGETNAME \
auto $_CCLK calc_checksum
flash bank $_FLASHNAME lpc2000 0x0 0 0 0 $_TARGETNAME \
auto $_CCLK calc_checksum
-if { $_CHIPSERIES == "lpc1100" || $_CHIPSERIES == "lpc1200" || $_CHIPSERIES == "lpc1300" } {
+if { $_CHIPSERIES == "lpc800" || $_CHIPSERIES == "lpc1100" || $_CHIPSERIES == "lpc1200" || $_CHIPSERIES == "lpc1300" } {
# Do not remap 0x0000-0x0200 to anything but the flash (i.e. select
# "User Flash Mode" where interrupt vectors are _not_ remapped,
# and reside in flash instead).
# Do not remap 0x0000-0x0200 to anything but the flash (i.e. select
# "User Flash Mode" where interrupt vectors are _not_ remapped,
# and reside in flash instead).
-# LPC11xx/LPC12xx (Cortex M0 core) supports SYSRESETREQ
-# LPC13xx/LPC17xx (Cortex M3 core) supports SYSRESETREQ
+# LPC8xx (Cortex M0+ core) support SYSRESETREQ
+# LPC11xx/LPC12xx (Cortex M0 core) support SYSRESETREQ
+# LPC13xx/LPC17xx (Cortex M3 core) support SYSRESETREQ
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
--- /dev/null
+# NXP LPC8xx Cortex-M0+ with at least 1kB SRAM
+set CHIPNAME lpc8xx
+set CHIPSERIES lpc800
+if { ![info exists WORKAREASIZE] } {
+ set WORKAREASIZE 0x400
+}
+
+source [find target/lpc1xxx.cfg]
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