Memory region addresses are not in use for now.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I9a2189e956ae59b56245ec914ab16719df857b2d
Reviewed-on: https://review.openocd.org/c/openocd/+/7762
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
*/
/* ESP32 memory map */
-#define ESP32_DRAM_LOW 0x3ffae000
-#define ESP32_DRAM_HIGH 0x40000000
-#define ESP32_IROM_MASK_LOW 0x40000000
-#define ESP32_IROM_MASK_HIGH 0x40064f00
-#define ESP32_IRAM_LOW 0x40070000
-#define ESP32_IRAM_HIGH 0x400a0000
-#define ESP32_RTC_IRAM_LOW 0x400c0000
-#define ESP32_RTC_IRAM_HIGH 0x400c2000
-#define ESP32_RTC_DRAM_LOW 0x3ff80000
-#define ESP32_RTC_DRAM_HIGH 0x3ff82000
#define ESP32_RTC_DATA_LOW 0x50000000
#define ESP32_RTC_DATA_HIGH 0x50002000
-#define ESP32_EXTRAM_DATA_LOW 0x3f800000
-#define ESP32_EXTRAM_DATA_HIGH 0x3fc00000
#define ESP32_DR_REG_LOW 0x3ff00000
#define ESP32_DR_REG_HIGH 0x3ff71000
#define ESP32_SYS_RAM_LOW 0x60000000UL
#include "esp_xtensa.h"
#include "esp_xtensa_semihosting.h"
-/* Overall memory map
- * TODO: read memory configuration from target registers */
-#define ESP32_S2_IROM_MASK_LOW 0x40000000
-#define ESP32_S2_IROM_MASK_HIGH 0x40020000
-#define ESP32_S2_IRAM_LOW 0x40020000
-#define ESP32_S2_IRAM_HIGH 0x40070000
-#define ESP32_S2_DRAM_LOW 0x3ffb0000
-#define ESP32_S2_DRAM_HIGH 0x40000000
-#define ESP32_S2_RTC_IRAM_LOW 0x40070000
-#define ESP32_S2_RTC_IRAM_HIGH 0x40072000
-#define ESP32_S2_RTC_DRAM_LOW 0x3ff9e000
-#define ESP32_S2_RTC_DRAM_HIGH 0x3ffa0000
#define ESP32_S2_RTC_DATA_LOW 0x50000000
#define ESP32_S2_RTC_DATA_HIGH 0x50002000
-#define ESP32_S2_EXTRAM_DATA_LOW 0x3f500000
-#define ESP32_S2_EXTRAM_DATA_HIGH 0x3ff80000
#define ESP32_S2_DR_REG_LOW 0x3f400000
#define ESP32_S2_DR_REG_HIGH 0x3f4d3FFC
#define ESP32_S2_SYS_RAM_LOW 0x60000000UL
#define ESP32_S2_SYS_RAM_HIGH (ESP32_S2_SYS_RAM_LOW + 0x20000000UL)
-/* ESP32-S2 DROM mapping is not contiguous. */
-/* IDF declares this as 0x3F000000..0x3FF80000, but there are peripheral registers mapped to
- * 0x3f400000..0x3f4d3FFC. */
-#define ESP32_S2_DROM0_LOW ESP32_S2_DROM_LOW
-#define ESP32_S2_DROM0_HIGH ESP32_S2_DR_REG_LOW
-#define ESP32_S2_DROM1_LOW ESP32_S2_DR_REG_HIGH
-#define ESP32_S2_DROM1_HIGH ESP32_S2_DROM_HIGH
/* ESP32 WDT */
#define ESP32_S2_WDT_WKEY_VALUE 0x50d83aa1
*/
/* ESP32_S3 memory map */
-#define ESP32_S3_IRAM_LOW 0x40370000
-#define ESP32_S3_IRAM_HIGH 0x403E0000
-#define ESP32_S3_IROM_MASK_LOW 0x40000000
-#define ESP32_S3_IROM_MASK_HIGH 0x40060000
-#define ESP32_S3_DRAM_LOW 0x3FC88000
-#define ESP32_S3_DRAM_HIGH 0x3FD00000
-#define ESP32_S3_RTC_IRAM_LOW 0x600FE000
-#define ESP32_S3_RTC_IRAM_HIGH 0x60100000
-#define ESP32_S3_RTC_DRAM_LOW 0x600FE000
-#define ESP32_S3_RTC_DRAM_HIGH 0x60100000
#define ESP32_S3_RTC_DATA_LOW 0x50000000
#define ESP32_S3_RTC_DATA_HIGH 0x50002000
#define ESP32_S3_EXTRAM_DATA_LOW 0x3D000000