tcl/target/ti_k3: Rename m3 target as sysctrl

The M3 is the system controller of the system. Lets rename it to make
clear what we are debugging - esp when multiple MCUs are present in the
system.

Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: I4cd03b6068b8ce140fd254f9dd88151c4c7006d7
Reviewed-on: https://review.openocd.org/c/openocd/+/6618
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index 8fb71482c9e9160b6ca5a348ce90c1f447ddeba2..ee4a5c8b367c36e4b9968acc94664e1d5d9f0eb7 100644 (file)
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -27,11 +27,11 @@ if { [info exists V8_SMP_DEBUG] } {
 
 # Common Definitions
 
-# CM3 the very first processor - all current SoCs have it.
+# System Controller is the very first processor - all current SoCs have it.
 set CM3_CTIBASE                {0x3C016000}
 
-# M3 power-ap unlock offsets
-set _m3_ap_unlock_offsets {0xf0 0x44}
+# sysctrl power-ap unlock offsets
+set _sysctrl_ap_unlock_offsets {0xf0 0x44}
 
 # All the ARMV8s are the next processors.
 #                 CL0,CORE0  CL0,CORE1  CL1,CORE0  CL1,CORE1
@@ -70,8 +70,8 @@ switch $_soc {
                set _main1_r5_cores 0
                set _main1_base_core_id 0
 
-               # M3 power-ap unlock offsets
-               set _m3_ap_unlock_offsets {0xf0 0x50}
+               # Sysctrl power-ap unlock offsets
+               set _sysctrl_ap_unlock_offsets {0xf0 0x50}
        }
        am642 {
                set _CHIPNAME am642
@@ -147,22 +147,22 @@ set _TARGETNAME $_CHIPNAME.cpu
 
 set _CTINAME $_CHIPNAME.cti
 
-# M3 is always present
-cti create $_CTINAME.m3 -dap $_CHIPNAME.dap -ap-num 7 -baseaddr [lindex $CM3_CTIBASE 0]
-target create $_TARGETNAME.m3 cortex_m -dap $_CHIPNAME.dap -ap-num 7 -defer-examine
-$_TARGETNAME.m3 configure -event reset-assert { }
+# sysctrl is always present
+cti create $_CTINAME.sysctrl -dap $_CHIPNAME.dap -ap-num 7 -baseaddr [lindex $CM3_CTIBASE 0]
+target create $_TARGETNAME.sysctrl cortex_m -dap $_CHIPNAME.dap -ap-num 7 -defer-examine
+$_TARGETNAME.sysctrl configure -event reset-assert { }
 
-proc m3_up {} {
-       # To access M3, we need to enable the JTAG access for the same.
+proc sysctrl_up {} {
+       # To access sysctrl, we need to enable the JTAG access for the same.
        # Ensure Power-AP unlocked
-       $::_CHIPNAME.dap apreg 3 [lindex $::_m3_ap_unlock_offsets 0] 0x00190000
-       $::_CHIPNAME.dap apreg 3 [lindex $::_m3_ap_unlock_offsets 1] 0x00102098
+       $::_CHIPNAME.dap apreg 3 [lindex $::_sysctrl_ap_unlock_offsets 0] 0x00190000
+       $::_CHIPNAME.dap apreg 3 [lindex $::_sysctrl_ap_unlock_offsets 1] 0x00102098
 
-       $::_TARGETNAME.m3 arp_examine
+       $::_TARGETNAME.sysctrl arp_examine
 }
 
-$_TARGETNAME.m3 configure -event gdb-attach {
-       m3_up
+$_TARGETNAME.sysctrl configure -event gdb-attach {
+       sysctrl_up
        # gdb-attach default rule
        halt 1000
 }