arm926ejs: fix gaffe when converting from arm926ejs cp15 to mcr
authorØyvind Harboe <oyvind.harboe@zylin.com>
Mon, 23 Nov 2009 17:23:10 +0000 (18:23 +0100)
committerØyvind Harboe <oyvind.harboe@zylin.com>
Mon, 23 Nov 2009 17:23:10 +0000 (18:23 +0100)
the first arg is the register number 15 = cp15.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
tcl/board/dm355evm.cfg
tcl/board/openrd.cfg
tcl/board/sheevaplug.cfg

index 2e298b7e7bf0b55a94046fad595f120b4fa379d6..2c8bea82998338003fac5e65528e0225179c2b79 100644 (file)
@@ -182,7 +182,7 @@ proc dm355evm_init {} {
        ########################
 
        # turn on icache - set I bit in cp15 register c1
-       mcr 0 0 1 0 0x00051078
+       mcr 15 0 0 1 0 0x00051078
 }
 
 # NAND -- socket has two chipselects, MT29F16G08FAA puts 1GByte on each one.
index 4bc708dadadd79d68709763a9910e2a275740d71..12cc79e49822a9fb6e4d267adb59fd3c2d62e710 100644 (file)
@@ -29,7 +29,7 @@ proc openrd_init { } {
        jtag_reset 0 0
        wait_halt
 
-       mcr 0 0 1 0 0x00052078
+       mcr 15 0 0 1 0 0x00052078
 
        mww 0xD0001400 0x43000C30 #  DDR SDRAM Configuration Register
        mww 0xD0001404 0x37543000 #  Dunit Control Low Register
index 8e8396d7eb4d13c281c62ea4152ce2c204ac3334..9267eb957c433e042c962745d975cb3b745d144b 100644 (file)
@@ -29,7 +29,7 @@ proc sheevaplug_init { } {
        jtag_reset 0 0
        wait_halt
 
-       mcr 0 0 1 0 0x00052078
+       mcr 15 0 0 1 0 0x00052078
 
        mww 0xD0001400 0x43000C30 #  DDR SDRAM Configuration Register
        mww 0xD0001404 0x39543000 #  Dunit Control Low Register

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