Globally rename "jtag_khz" as "adapter_khz", and move it out of the "jtag"
command group ... it needs to be used with non-JTAG transports
Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break. That aid should Sunset in about a year. (We may want to
update it to include a nag message too.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
49 files changed:
JTAG Layer:
New driver for "Bus Pirate"
JTAG Layer:
New driver for "Bus Pirate"
+ Rename various commands so they're not JTAG-specific
+ There are migration procedures for these, but you should
+ convert your scripts to the new names, since those procedures
+ will not be around forever.
+ jtag_khz ... is now adapter_khz
If both the chip and the board support adaptive clocking,
use the @command{jtag_rclk}
command, in case your board is used with JTAG adapter which
If both the chip and the board support adaptive clocking,
use the @command{jtag_rclk}
command, in case your board is used with JTAG adapter which
-also supports it. Otherwise use @command{jtag_khz}.
+also supports it. Otherwise use @command{adapter_khz}.
Set the slow rate at the beginning of the reset sequence,
and the faster rate as soon as the clocks are at full speed.
Set the slow rate at the beginning of the reset sequence,
and the faster rate as soon as the clocks are at full speed.
@deffn Command {parport_toggling_time} [nanoseconds]
Displays how many nanoseconds the hardware needs to toggle TCK;
the parport driver uses this value to obey the
@deffn Command {parport_toggling_time} [nanoseconds]
Displays how many nanoseconds the hardware needs to toggle TCK;
the parport driver uses this value to obey the
-@command{jtag_khz} configuration.
+@command{adapter_khz} configuration.
When the optional @var{nanoseconds} parameter is given,
that setting is changed before displaying the current value.
When the optional @var{nanoseconds} parameter is given,
that setting is changed before displaying the current value.
oscilloscope, follow the procedure below:
@example
> parport_toggling_time 1000
oscilloscope, follow the procedure below:
@example
> parport_toggling_time 1000
@end example
This sets the maximum JTAG clock speed of the hardware, but
the actual speed probably deviates from the requested 500 kHz.
@end example
This sets the maximum JTAG clock speed of the hardware, but
the actual speed probably deviates from the requested 500 kHz.
@example
> parport_toggling_time <measured nanoseconds>
@end example
@example
> parport_toggling_time <measured nanoseconds>
@end example
-Now the clock speed will be a better match for @command{jtag_khz rate}
+Now the clock speed will be a better match for @command{adapter_khz rate}
commands given in OpenOCD scripts and event handlers.
You can do something similar with many digital multimeters, but note
that you'll probably need to run the clock continuously for several
seconds before it decides what clock rate to show. Adjust the
toggling time up or down until the measured clock rate is a good
commands given in OpenOCD scripts and event handlers.
You can do something similar with many digital multimeters, but note
that you'll probably need to run the clock continuously for several
seconds before it decides what clock rate to show. Adjust the
toggling time up or down until the measured clock rate is a good
-match for the jtag_khz rate you specified; be conservative.
+match for the adapter_khz rate you specified; be conservative.
@end quotation
@end deffn
@end quotation
@end deffn
may not be the fastest solution.
@b{NOTE:} Script writers should consider using @command{jtag_rclk}
may not be the fastest solution.
@b{NOTE:} Script writers should consider using @command{jtag_rclk}
-instead of @command{jtag_khz}, but only for (ARM) cores and boards
+instead of @command{adapter_khz}, but only for (ARM) cores and boards
which support adaptive clocking.
which support adaptive clocking.
-@deffn {Command} jtag_khz max_speed_kHz
+@deffn {Command} adapter_khz max_speed_kHz
A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
JTAG interfaces usually support a limited number of
speeds. The speed actually used won't be faster
A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
JTAG interfaces usually support a limited number of
speeds. The speed actually used won't be faster
before @command{reset_init} is called.
This is the most robust place to use @command{jtag_rclk}
before @command{reset_init} is called.
This is the most robust place to use @command{jtag_rclk}
-or @command{jtag_khz} to switch to a low JTAG clock rate,
+or @command{adapter_khz} to switch to a low JTAG clock rate,
when reset disables PLLs needed to use a fast clock.
@ignore
@item @b{reset-wait-pos}
when reset disables PLLs needed to use a fast clock.
@ignore
@item @b{reset-wait-pos}
@example
# Example: 1.234MHz
@example
# Example: 1.234MHz
-static int jtag_khz_to_speed(unsigned khz, int* speed)
+static int adapter_khz_to_speed(unsigned khz, int* speed)
{
LOG_DEBUG("convert khz to interface specific speed value");
speed_khz = khz;
{
LOG_DEBUG("convert khz to interface specific speed value");
speed_khz = khz;
static int jtag_rclk_to_speed(unsigned fallback_speed_khz, int* speed)
{
static int jtag_rclk_to_speed(unsigned fallback_speed_khz, int* speed)
{
- int retval = jtag_khz_to_speed(0, speed);
+ int retval = adapter_khz_to_speed(0, speed);
if ((ERROR_OK != retval) && fallback_speed_khz)
{
LOG_DEBUG("trying fallback speed...");
if ((ERROR_OK != retval) && fallback_speed_khz)
{
LOG_DEBUG("trying fallback speed...");
- retval = jtag_khz_to_speed(fallback_speed_khz, speed);
+ retval = adapter_khz_to_speed(fallback_speed_khz, speed);
LOG_DEBUG("handle jtag khz");
clock_mode = CLOCK_MODE_KHZ;
int speed = 0;
LOG_DEBUG("handle jtag khz");
clock_mode = CLOCK_MODE_KHZ;
int speed = 0;
- int retval = jtag_khz_to_speed(khz, &speed);
+ int retval = adapter_khz_to_speed(khz, &speed);
return (ERROR_OK != retval) ? retval : jtag_set_speed(speed);
}
return (ERROR_OK != retval) ? retval : jtag_set_speed(speed);
}
speed = jtag_speed;
break;
case CLOCK_MODE_KHZ:
speed = jtag_speed;
break;
case CLOCK_MODE_KHZ:
- jtag_khz_to_speed(jtag_get_speed_khz(), &speed);
+ adapter_khz_to_speed(jtag_get_speed_khz(), &speed);
break;
case CLOCK_MODE_RCLK:
jtag_rclk_to_speed(rclk_fallback_speed_khz, &speed);
break;
case CLOCK_MODE_RCLK:
jtag_rclk_to_speed(rclk_fallback_speed_khz, &speed);
/* -------------------------------------------------------------------------- */
/* -------------------------------------------------------------------------- */
-static int presto_jtag_khz(int khz, int *jtag_speed)
+static int presto_adapter_khz(int khz, int *jtag_speed)
.execute_queue = bitq_execute_queue,
.speed = presto_jtag_speed,
.execute_queue = bitq_execute_queue,
.speed = presto_jtag_speed,
- .khz = presto_jtag_khz,
+ .khz = presto_adapter_khz,
.speed_div = presto_jtag_speed_div,
.init = presto_jtag_init,
.quit = presto_jtag_quit,
.speed_div = presto_jtag_speed_div,
.init = presto_jtag_init,
.quit = presto_jtag_quit,
proc srst_asserted {} {
puts "Sensed nSRST asserted."
}
proc srst_asserted {} {
puts "Sensed nSRST asserted."
}
+
+# BEGIN MIGRATION AIDS ... these adapter operations originally had
+# JTAG-specific names despite the fact that the operations were not
+# specific to JTAG.
+#
+# FIXME phase these aids out after about April 2011
+#
+proc jtag_khz args { eval adapter_khz $args }
+# END MIGRATION AIDS
-COMMAND_HANDLER(handle_jtag_khz_command)
+COMMAND_HANDLER(handle_adapter_khz_command)
{
if (CMD_ARGC > 1)
return ERROR_COMMAND_SYNTAX_ERROR;
{
if (CMD_ARGC > 1)
return ERROR_COMMAND_SYNTAX_ERROR;
}
static const struct command_registration interface_command_handlers[] = {
}
static const struct command_registration interface_command_handlers[] = {
+ {
+ .name = "adapter_khz",
+ .handler = handle_adapter_khz_command,
+ .mode = COMMAND_ANY,
+ .help = "With an argument, change to the specified maximum "
+ "jtag speed. For JTAG, 0 KHz signifies adaptive "
+ " clocking. "
+ "With or without argument, display current setting.",
+ .usage = "[khz]",
+ },
{
.name = "interface",
.handler = handle_interface_command,
{
.name = "interface",
.handler = handle_interface_command,
}
static const struct command_registration jtag_command_handlers[] = {
}
static const struct command_registration jtag_command_handlers[] = {
- {
- .name = "jtag_khz",
- .handler = handle_jtag_khz_command,
- .mode = COMMAND_ANY,
- .help = "With an argument, change to the specified maximum "
- "jtag speed. Pass 0 to require adaptive clocking. "
- "With or without argument, display current setting.",
- .usage = "[khz]",
- },
{
.name = "jtag_rclk",
.handler = handle_jtag_rclk_command,
{
.name = "jtag_rclk",
.handler = handle_jtag_rclk_command,
// TODO: set jtag speed to
if (svf_para.frequency > 0)
{
// TODO: set jtag speed to
if (svf_para.frequency > 0)
{
- command_run_linef(cmd_ctx, "jtag_khz %d", (int)svf_para.frequency / 1000);
+ command_run_linef(cmd_ctx, "adapter_khz %d", (int)svf_para.frequency / 1000);
LOG_DEBUG("\tfrequency = %f", svf_para.frequency);
}
}
LOG_DEBUG("\tfrequency = %f", svf_para.frequency);
}
}
}
# This target is pretty snappy...
}
# This target is pretty snappy...
proc at91rm9200_dk_init { } {
# Try to run at 1khz... Yea, that slow!
# Chip is really running @ 32khz
proc at91rm9200_dk_init { } {
# Try to run at 1khz... Yea, that slow!
# Chip is really running @ 32khz
mww 0xfffffc64 0xffffffff
## disable all clocks but system clock
mww 0xfffffc64 0xffffffff
## disable all clocks but system clock
#========================================
# CPU now runs at 180mhz
# SYS runs at 60mhz.
#========================================
# CPU now runs at 180mhz
# SYS runs at 60mhz.
#========================================
#========================================
# means the master clock (MCLK) must be at or below 133 MHz or timing errors will occur. The processor
# core can operate up to 400 MHz and therefore PCLK must be at or below this to function properly.
# means the master clock (MCLK) must be at or below 133 MHz or timing errors will occur. The processor
# core can operate up to 400 MHz and therefore PCLK must be at or below this to function properly.
- jtag_khz 2 # Slow-speed oscillator enabled at reset, so run jtag speed slow.
+ adapter_khz 2 # Slow-speed oscillator enabled at reset, so run jtag speed slow.
halt # Make sure processor is halted, or error will result in following steps.
mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset.
mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdog.
halt # Make sure processor is halted, or error will result in following steps.
mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset.
mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdog.
# Switch over to adaptive clocking.
# Switch over to adaptive clocking.
# Enable faster DCC downloads.
# Enable faster DCC downloads.
proc csb337_clk_init { } {
# CPU is in Slow Clock Mode (32KiHz) ... needs slow JTAG clock
proc csb337_clk_init { } {
# CPU is in Slow Clock Mode (32KiHz) ... needs slow JTAG clock
# CKGR_MOR: start main oscillator (3.6864 MHz)
mww 0xfffffc20 0xff01
# CKGR_MOR: start main oscillator (3.6864 MHz)
mww 0xfffffc20 0xff01
sleep 20
# CPU is in Normal Mode ... allows faster JTAG clock speed
sleep 20
# CPU is in Normal Mode ... allows faster JTAG clock speed
}
proc csb337_nor_init { } {
}
proc csb337_nor_init { } {
echo "Initialize DM365 EVM board"
# CLKIN = 24 MHz ... can't talk quickly to ARM yet
echo "Initialize DM365 EVM board"
# CLKIN = 24 MHz ... can't talk quickly to ARM yet
# http://www.luminarymicro.com/products/lm3s1968_evaluation_kits.html
# NOTE: to use J-Link instead of the on-board interface,
# http://www.luminarymicro.com/products/lm3s1968_evaluation_kits.html
# NOTE: to use J-Link instead of the on-board interface,
-# you may also need to reduce jtag_khz to be about 1200.
+# you may also need to reduce adapter_khz to be about 1200.
# source [find interface/jlink.cfg]
# include the FT2232 interface config for on-board JTAG interface
# source [find interface/jlink.cfg]
# include the FT2232 interface config for on-board JTAG interface
source [find target/lm3s1968.cfg]
# jtag speed
source [find target/lm3s1968.cfg]
# jtag speed
source [find target/lm3s811.cfg]
# jtag speed
source [find target/lm3s811.cfg]
# jtag speed
source [find target/lm3s9b9x.cfg]
# jtag speed
source [find target/lm3s9b9x.cfg]
# jtag speed
arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable
arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable
# Maximum of 1/8 of clock frequency (XTAL = 16 MHz).
# Adaptive clocking through RTCK is not supported.
# Maximum of 1/8 of clock frequency (XTAL = 16 MHz).
# Adaptive clocking through RTCK is not supported.
# Target device: LPC29xx with ETB
# The following variables are used by the LPC2900 script:
# Target device: LPC29xx with ETB
# The following variables are used by the LPC2900 script:
# Event handlers
$_TARGETNAME configure -event reset-start {
# Back to the slow JTAG clock
# Event handlers
$_TARGETNAME configure -event reset-start {
# Back to the slow JTAG clock
}
# External 16-bit flash at chip select CS7 (SST39VF3201-70, 4 MiB)
}
# External 16-bit flash at chip select CS7 (SST39VF3201-70, 4 MiB)
mww 0xFFFF8070 0x02000000 # SYS_CLK_CONF: PLL
# Increase JTAG speed
mww 0xFFFF8070 0x02000000 # SYS_CLK_CONF: PLL
# Increase JTAG speed
# Enable external memory bus (16-bit SRAM at CS6, 16-bit flash at CS7)
mww 0xE0001138 0x0000001F # P1.14 = D0
# Enable external memory bus (16-bit SRAM at CS6, 16-bit flash at CS7)
mww 0xE0001138 0x0000001F # P1.14 = D0
source [find interface/hitex_str9-comstick.cfg]
# set jtag speed
source [find interface/hitex_str9-comstick.cfg]
# set jtag speed
jtag_nsrst_delay 100
jtag_ntrst_delay 100
jtag_nsrst_delay 100
jtag_ntrst_delay 100
# This setup puts RAM at 0xA0000000
# reset the board correctly
# This setup puts RAM at 0xA0000000
# reset the board correctly
# IMPORTANT! See README at top of this file.
#-------------------------------------------------------------------------
# IMPORTANT! See README at top of this file.
#-------------------------------------------------------------------------
jtag interface
#-------------------------------------------------------------------------
jtag interface
#-------------------------------------------------------------------------
jtag_nsrst_delay 200
jtag_ntrst_delay 1
jtag_nsrst_delay 200
jtag_ntrst_delay 1
reset_config trst_and_srst separate
arm7_9 dcc_downloads enable
reset_config trst_and_srst separate
arm7_9 dcc_downloads enable
$_TARGETNAME configure -event reset-start {
arm7_9 fast_memory_access disable
$_TARGETNAME configure -event reset-start {
arm7_9 fast_memory_access disable
}
$_TARGETNAME configure -event reset-end {
}
$_TARGETNAME configure -event reset-end {
arm7_9 fast_memory_access enable
}
arm7_9 fast_memory_access enable
}
# issue telnet: reset init
# issue gdb: monitor reset init
$_TARGETNAME configure -event reset-init {
# issue telnet: reset init
# issue gdb: monitor reset init
$_TARGETNAME configure -event reset-init {
# this will setup Telo board
setupTelo
#turn up the JTAG speed
# this will setup Telo board
setupTelo
#turn up the JTAG speed
puts "JTAG speek now 3MHz"
puts "type helpC100 to get help on C100"
}
puts "JTAG speek now 3MHz"
puts "type helpC100 to get help on C100"
}
mww 0xf4300004 0x00000000
sleep 10
mww 0xf4300004 0x00000000
sleep 10
# remap off in case of IROM boot
mww 0xf0000004 0x00000001
# remap off in case of IROM boot
mww 0xf0000004 0x00000001
mww 0xf4300004 0x00000000
sleep 10
mww 0xf4300004 0x00000000
sleep 10
# remap off in case of IROM boot
mww 0xf0000004 0x00000001
# remap off in case of IROM boot
mww 0xf0000004 0x00000001
# other things than flash programming.
$_TARGETNAME configure -work-area-phys 0x00020000 -work-area-size 0x20000 -work-area-backup 0
# other things than flash programming.
$_TARGETNAME configure -work-area-phys 0x00020000 -work-area-size 0x20000 -work-area-backup 0
proc production_info {} {
proc production_info {} {
# These are already the defaults.
# usb_blaster_vid_pid 0x09FB 0x6001
# usb_blaster_device_desc "USB-Blaster"
# These are already the defaults.
# usb_blaster_vid_pid 0x09FB 0x6001
# usb_blaster_device_desc "USB-Blaster"
ft2232_device_desc "OOCDLink"
ft2232_layout oocdlink
ft2232_vid_pid 0x0403 0xbaf8
ft2232_device_desc "OOCDLink"
ft2232_layout oocdlink
ft2232_vid_pid 0x0403 0xbaf8
ft2232_layout sheevaplug
ft2232_vid_pid 0x0403 0x9e90
ft2232_device_desc "OpenRD JTAGKey FT2232D B"
ft2232_layout sheevaplug
ft2232_vid_pid 0x0403 0x9e90
ft2232_device_desc "OpenRD JTAGKey FT2232D B"
ft2232_layout sheevaplug
ft2232_vid_pid 0x9e88 0x9e8f
ft2232_device_desc "SheevaPlug JTAGKey FT2232D B"
ft2232_layout sheevaplug
ft2232_vid_pid 0x9e88 0x9e8f
ft2232_device_desc "SheevaPlug JTAGKey FT2232D B"
interface usb_blaster
usb_blaster_vid_pid 0x16C0 0x06AD
usb_blaster_device_desc "USB-JTAG-IF"
interface usb_blaster
usb_blaster_vid_pid 0x16C0 0x06AD
usb_blaster_device_desc "USB-JTAG-IF"
vsllink_usb_interface 1
# vsllink mode, dma or normal
vsllink_usb_interface 1
# vsllink mode, dma or normal
-# for low jtag_khz, use normal
-# for high jtag_khz, use dma
+# for low adapter_khz, use normal
+# for high adapter_khz, use dma
#vsllink_mode dma
vsllink_mode normal
#vsllink_mode dma
vsllink_mode normal
######################################
######################################
proc at91sam_init { } {
# at reset chip runs at 32khz
proc at91sam_init { } {
# at reset chip runs at 32khz
halt
mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset
mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdog
halt
mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset
mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdog
sleep 10 # wait 10 ms
# Now run at anything fast... ie: 10mhz!
sleep 10 # wait 10 ms
# Now run at anything fast... ie: 10mhz!
- jtag_khz 10000 # Increase JTAG Speed to 6 MHz
+ adapter_khz 10000 # Increase JTAG Speed to 6 MHz
arm7_9 dcc_downloads enable # Enable faster DCC downloads
mww 0xffffec00 0x0a0a0a0a # SMC_SETUP0 : Setup SMC for Intel NOR Flash JS28F128P30T85 128MBit
arm7_9 dcc_downloads enable # Enable faster DCC downloads
mww 0xffffec00 0x0a0a0a0a # SMC_SETUP0 : Setup SMC for Intel NOR Flash JS28F128P30T85 128MBit
# this script only configures one core (that is used to run Linux)
# assume no PLL lock, start slowly
# this script only configures one core (that is used to run Linux)
# assume no PLL lock, start slowly
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
mww $TIMER_WDT_HIGH_BOUND 0xffffff
mww $TIMER_WDT_CURRENT_COUNT 0x0
puts "JTAG speed lowered to 100kHz"
mww $TIMER_WDT_HIGH_BOUND 0xffffff
mww $TIMER_WDT_CURRENT_COUNT 0x0
puts "JTAG speed lowered to 100kHz"
mww $TIMER_WDT_CONTROL 0x1
# wait until the reset
puts -nonewline "Wating for watchdog to trigger..."
mww $TIMER_WDT_CONTROL 0x1
# wait until the reset
puts -nonewline "Wating for watchdog to trigger..."
#has only srst
reset_config srst_only
#has only srst
reset_config srst_only
jtag_nsrst_delay 100
jtag_ntrst_delay 100
jtag_nsrst_delay 100
jtag_ntrst_delay 100
jtag_nsrst_delay 100
jtag_ntrst_delay 100
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
flash bank $_FLASHNAME lpc2000 0x0 0x0007D000 0 0 $_TARGETNAME lpc2000_v2 4000 calc_checksum
# 4MHz / 6 = 666kHz, so use 500
flash bank $_FLASHNAME lpc2000 0x0 0x0007D000 0 0 $_TARGETNAME lpc2000_v2 4000 calc_checksum
# 4MHz / 6 = 666kHz, so use 500
# rclk hasn't been working well. This maybe the mc13224v or something else.
#jtag_rclk 2000
# rclk hasn't been working well. This maybe the mc13224v or something else.
#jtag_rclk 2000
######################
# Target configuration
######################
# Target configuration
set _ENDIAN little
# jtag speed
set _ENDIAN little
# jtag speed
reset_config srst_only
jtag_nsrst_delay 100
reset_config srst_only
jtag_nsrst_delay 100
#to use it, script will be like:
#init
#to use it, script will be like:
#init
#reset init
#verify_ircapture disable
#
#reset init
#verify_ircapture disable
#
# PXA255 comes out of reset using 3.6864 MHz oscillator.
# Until the PLL kicks in, keep the JTAG clock slow enough
# that we get no errors.
# PXA255 comes out of reset using 3.6864 MHz oscillator.
# Until the PLL kicks in, keep the JTAG clock slow enough
# that we get no errors.
-jtag_khz 300
-$_TARGETNAME configure -event "reset-start" { jtag_khz 300 }
+adapter_khz 300
+$_TARGETNAME configure -event "reset-start" { adapter_khz 300 }
# both TRST and SRST are *required* for debug
# DCSR is often accessed with SRST active
# both TRST and SRST are *required* for debug
# DCSR is often accessed with SRST active
flash write_image [file] <parameters>
verify_image [file] <parameters>
flash write_image [file] <parameters>
verify_image [file] <parameters>
-4. jtag_khz sets the maximum speed (or alternatively RCLK). If invoked
+4. adapter_khz sets the maximum speed (or alternatively RCLK). If invoked
multiple times only the last setting is used.
interface/xxx.cfg files are always executed *before* target/xxx.cfg
multiple times only the last setting is used.
interface/xxx.cfg files are always executed *before* target/xxx.cfg
-files, so any jtag_khz in interface/xxx.cfg will be overridden by
-target/xxx.cfg. jtag_khz in interface/xxx.cfg would then, effectively,
+files, so any adapter_khz in interface/xxx.cfg will be overridden by
+target/xxx.cfg. adapter_khz in interface/xxx.cfg would then, effectively,
set the default JTAG speed.
Note that a target/xxx.cfg file can invoke another target/yyy.cfg file,
set the default JTAG speed.
Note that a target/xxx.cfg file can invoke another target/yyy.cfg file,
#
# Really low clock during reset?
#
#
# Really low clock during reset?
#
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
# NOTE: this may be increased by a reset-init handler, after it
# configures and enables the PLL. Or you might need to decrease
# this, if you're using a slower clock.
# NOTE: this may be increased by a reset-init handler, after it
# configures and enables the PLL. Or you might need to decrease
# this, if you're using a slower clock.
-jtag_khz 500
-$_TARGETNAME configure -event reset-start {jtag_khz 500}
+adapter_khz 500
+$_TARGETNAME configure -event reset-start {adapter_khz 500}
# flash configuration ... autodetects sizes, autoprobed
flash bank $_CHIPNAME.flash stellaris 0 0 0 0 $_TARGETNAME
# flash configuration ... autodetects sizes, autoprobed
flash bank $_CHIPNAME.flash stellaris 0 0 0 0 $_TARGETNAME
}
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
}
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
jtag_nsrst_delay 100
jtag_ntrst_delay 100
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#start slow, speed up after reset
#start slow, speed up after reset
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
-$_TARGETNAME configure -event reset-start { jtag_khz 10 }
+$_TARGETNAME configure -event reset-start { adapter_khz 10 }
$_TARGETNAME configure -event reset-init {
$_TARGETNAME configure -event reset-init {
# Because the hardware cannot be interrogated for the protection state
# of sectors, initialize all the sectors to be unprotected. The initial
# Because the hardware cannot be interrogated for the protection state
# of sectors, initialize all the sectors to be unprotected. The initial
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
-$_TARGETNAME configure -event reset-start { jtag_khz 10 }
+$_TARGETNAME configure -event reset-start { adapter_khz 10 }
$_TARGETNAME configure -event reset-init {
$_TARGETNAME configure -event reset-init {
# Because the hardware cannot be interrogated for the protection state
# of sectors, initialize all the sectors to be unprotected. The initial
# Because the hardware cannot be interrogated for the protection state
# of sectors, initialize all the sectors to be unprotected. The initial
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
-$_TARGETNAME configure -event reset-start { jtag_khz 10 }
+$_TARGETNAME configure -event reset-start { adapter_khz 10 }
$_TARGETNAME configure -event reset-init {
$_TARGETNAME configure -event reset-init {
# Because the hardware cannot be interrogated for the protection state
# of sectors, initialize all the sectors to be unprotected. The initial
# Because the hardware cannot be interrogated for the protection state
# of sectors, initialize all the sectors to be unprotected. The initial
# issue telnet: reset init
# issue gdb: monitor reset init
$_TARGETNAME configure -event reset-init {
# issue telnet: reset init
# issue gdb: monitor reset init
$_TARGETNAME configure -event reset-init {
# this will setup Telo board
setupTelo
#turn up the JTAG speed
# this will setup Telo board
setupTelo
#turn up the JTAG speed
- jtag_khz 3000
- puts "JTAG speek now 3MHz"
+ adapter_khz 3000
+ puts "JTAG speed now 3MHz"
puts "type helpC100 to get help on C100"
}
puts "type helpC100 to get help on C100"
}
flash bank $_FLASHNAME cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
# writing data to memory does not work without this
flash bank $_FLASHNAME cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
# writing data to memory does not work without this
-memwrite burst disable
\ No newline at end of file
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