cfi: use ARM32 machine code on all CPUs but Cortex M3

ARM11 broke with aa61a3b3d8b6acad19050987835ec05f3d298bdb
as the code only checked for arm 7/9.

CFI probably needs work for non-ARM targets but perhaps
not adding working area memory to e.g. MIPS will give
the default slow CFI support.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c
index f462d72100c7c7907b9cc88cde90e45f6c58989c..1fa3f2da602a7512e21a4ac3ab7503af98b5f6a1 100644 (file)
--- a/src/flash/nor/cfi.c
+++ b/src/flash/nor/cfi.c
@@ -1651,17 +1651,13 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
                armv4_5_info.core_mode = ARMV7M_MODE_HANDLER;
                armv4_5_info.core_state = ARM_STATE_ARM;
        }
-       else if (is_arm7_9(target_to_arm7_9(target)))
+       else
        {
+               /* All other ARM CPUs have 32 bit instructions */
                armv4_5_info.common_magic = ARM_COMMON_MAGIC;
                armv4_5_info.core_mode = ARM_MODE_SVC;
                armv4_5_info.core_state = ARM_STATE_ARM;
        }
-       else
-       {
-               /* fallback to slow writes */
-               return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       }
 
        int target_code_size = 0;
        const uint32_t *target_code_src = NULL;