aarch64: don't segfault on reset when target is not examined 31/3831/4
authorMatthias Welwarsky <matthias.welwarsky@sysgo.com>
Fri, 21 Oct 2016 14:59:28 +0000 (16:59 +0200)
committerMatthias Welwarsky <matthias.welwarsky@sysgo.com>
Fri, 10 Feb 2017 13:18:35 +0000 (14:18 +0100)
Basically port a fix that was already done for the cortex_a target.

Change-Id: I4cf4519159bda03ed611bc0b2e340a5dad2d85fe
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
src/target/aarch64.c

index 487173886fbe85f19451edb9706135039703f823..cabeb9cd35fcad0027c31622b1f1183e8fffa143 100644 (file)
@@ -1316,7 +1316,8 @@ static int aarch64_assert_reset(struct target *target)
        }
 
        /* registers are now invalid */
-       register_cache_invalidate(armv8->arm.core_cache);
+       if (target_was_examined(target))
+               register_cache_invalidate(armv8->arm.core_cache);
 
        target->state = TARGET_RESET;
 
@@ -1332,6 +1333,9 @@ static int aarch64_deassert_reset(struct target *target)
        /* be certain SRST is off */
        jtag_add_reset(0, 0);
 
+       if (!target_was_examined(target))
+               return ERROR_OK;
+
        retval = aarch64_poll(target);
        if (retval != ERROR_OK)
                return retval;

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