-static char* etm_reg_list[] =
-{
- "ETM_CTRL",
- "ETM_CONFIG",
- "ETM_TRIG_EVENT",
- "ETM_MMD_CTRL",
- "ETM_STATUS",
- "ETM_SYS_CONFIG",
- "ETM_TRACE_RESOURCE_CTRL",
- "ETM_TRACE_EN_CTRL2",
- "ETM_TRACE_EN_EVENT",
- "ETM_TRACE_EN_CTRL1",
- "ETM_FIFOFULL_REGION",
- "ETM_FIFOFULL_LEVEL",
- "ETM_VIEWDATA_EVENT",
- "ETM_VIEWDATA_CTRL1",
- "ETM_VIEWDATA_CTRL2",
- "ETM_VIEWDATA_CTRL3",
- "ETM_ADDR_COMPARATOR_VALUE1",
- "ETM_ADDR_COMPARATOR_VALUE2",
- "ETM_ADDR_COMPARATOR_VALUE3",
- "ETM_ADDR_COMPARATOR_VALUE4",
- "ETM_ADDR_COMPARATOR_VALUE5",
- "ETM_ADDR_COMPARATOR_VALUE6",
- "ETM_ADDR_COMPARATOR_VALUE7",
- "ETM_ADDR_COMPARATOR_VALUE8",
- "ETM_ADDR_COMPARATOR_VALUE9",
- "ETM_ADDR_COMPARATOR_VALUE10",
- "ETM_ADDR_COMPARATOR_VALUE11",
- "ETM_ADDR_COMPARATOR_VALUE12",
- "ETM_ADDR_COMPARATOR_VALUE13",
- "ETM_ADDR_COMPARATOR_VALUE14",
- "ETM_ADDR_COMPARATOR_VALUE15",
- "ETM_ADDR_COMPARATOR_VALUE16",
- "ETM_ADDR_ACCESS_TYPE1",
- "ETM_ADDR_ACCESS_TYPE2",
- "ETM_ADDR_ACCESS_TYPE3",
- "ETM_ADDR_ACCESS_TYPE4",
- "ETM_ADDR_ACCESS_TYPE5",
- "ETM_ADDR_ACCESS_TYPE6",
- "ETM_ADDR_ACCESS_TYPE7",
- "ETM_ADDR_ACCESS_TYPE8",
- "ETM_ADDR_ACCESS_TYPE9",
- "ETM_ADDR_ACCESS_TYPE10",
- "ETM_ADDR_ACCESS_TYPE11",
- "ETM_ADDR_ACCESS_TYPE12",
- "ETM_ADDR_ACCESS_TYPE13",
- "ETM_ADDR_ACCESS_TYPE14",
- "ETM_ADDR_ACCESS_TYPE15",
- "ETM_ADDR_ACCESS_TYPE16",
- "ETM_DATA_COMPARATOR_VALUE1",
- "ETM_DATA_COMPARATOR_VALUE2",
- "ETM_DATA_COMPARATOR_VALUE3",
- "ETM_DATA_COMPARATOR_VALUE4",
- "ETM_DATA_COMPARATOR_VALUE5",
- "ETM_DATA_COMPARATOR_VALUE6",
- "ETM_DATA_COMPARATOR_VALUE7",
- "ETM_DATA_COMPARATOR_VALUE8",
- "ETM_DATA_COMPARATOR_VALUE9",
- "ETM_DATA_COMPARATOR_VALUE10",
- "ETM_DATA_COMPARATOR_VALUE11",
- "ETM_DATA_COMPARATOR_VALUE12",
- "ETM_DATA_COMPARATOR_VALUE13",
- "ETM_DATA_COMPARATOR_VALUE14",
- "ETM_DATA_COMPARATOR_VALUE15",
- "ETM_DATA_COMPARATOR_VALUE16",
- "ETM_DATA_COMPARATOR_MASK1",
- "ETM_DATA_COMPARATOR_MASK2",
- "ETM_DATA_COMPARATOR_MASK3",
- "ETM_DATA_COMPARATOR_MASK4",
- "ETM_DATA_COMPARATOR_MASK5",
- "ETM_DATA_COMPARATOR_MASK6",
- "ETM_DATA_COMPARATOR_MASK7",
- "ETM_DATA_COMPARATOR_MASK8",
- "ETM_DATA_COMPARATOR_MASK9",
- "ETM_DATA_COMPARATOR_MASK10",
- "ETM_DATA_COMPARATOR_MASK11",
- "ETM_DATA_COMPARATOR_MASK12",
- "ETM_DATA_COMPARATOR_MASK13",
- "ETM_DATA_COMPARATOR_MASK14",
- "ETM_DATA_COMPARATOR_MASK15",
- "ETM_DATA_COMPARATOR_MASK16",
- "ETM_COUNTER_INITAL_VALUE1",
- "ETM_COUNTER_INITAL_VALUE2",
- "ETM_COUNTER_INITAL_VALUE3",
- "ETM_COUNTER_INITAL_VALUE4",
- "ETM_COUNTER_ENABLE1",
- "ETM_COUNTER_ENABLE2",
- "ETM_COUNTER_ENABLE3",
- "ETM_COUNTER_ENABLE4",
- "ETM_COUNTER_RELOAD_VALUE1",
- "ETM_COUNTER_RELOAD_VALUE2",
- "ETM_COUNTER_RELOAD_VALUE3",
- "ETM_COUNTER_RELOAD_VALUE4",
- "ETM_COUNTER_VALUE1",
- "ETM_COUNTER_VALUE2",
- "ETM_COUNTER_VALUE3",
- "ETM_COUNTER_VALUE4",
- "ETM_SEQUENCER_CTRL1",
- "ETM_SEQUENCER_CTRL2",
- "ETM_SEQUENCER_CTRL3",
- "ETM_SEQUENCER_CTRL4",
- "ETM_SEQUENCER_CTRL5",
- "ETM_SEQUENCER_CTRL6",
- "ETM_SEQUENCER_STATE",
- "ETM_EXTERNAL_OUTPUT1",
- "ETM_EXTERNAL_OUTPUT2",
- "ETM_EXTERNAL_OUTPUT3",
- "ETM_EXTERNAL_OUTPUT4",
- "ETM_CONTEXTID_COMPARATOR_VALUE1",
- "ETM_CONTEXTID_COMPARATOR_VALUE2",
- "ETM_CONTEXTID_COMPARATOR_VALUE3",
- "ETM_CONTEXTID_COMPARATOR_MASK"
+/*
+ * Registers 0..0x7f are JTAG-addressable using scanchain 6.
+ * Newer versions of ETM make some W/O registers R/W, and
+ * provide definitions for some previously-unused bits.
+ */
+static const struct etm_reg_info reg[] = {
+ /* ETM Trace Registers */
+ { ETM_CTRL, 32, RW, 0x10, "ETM_CTRL", },
+ { ETM_CONFIG, 32, RO, 0x10, "ETM_CONFIG", },
+ { ETM_TRIG_EVENT, 17, WO, 0x10, "ETM_TRIG_EVENT", },
+ { ETM_ASIC_CTRL, 8, WO, 0x10, "ETM_ASIC_CTRL", },
+ { ETM_STATUS, 3, RO, 0x11, "ETM_STATUS", },
+ { ETM_SYS_CONFIG, 9, RO, 0x12, "ETM_SYS_CONFIG", },
+
+ /* TraceEnable configuration */
+ { ETM_TRACE_RESOURCE_CTRL, 32, WO, 0x12, "ETM_TRACE_RESOURCE_CTRL", },
+ { ETM_TRACE_EN_CTRL2, 16, WO, 0x12, "ETM_TRACE_EN_CTRL2", },
+ { ETM_TRACE_EN_EVENT, 17, WO, 0x10, "ETM_TRACE_EN_EVENT", },
+ { ETM_TRACE_EN_CTRL1, 26, WO, 0x10, "ETM_TRACE_EN_CTRL1", },
+
+ /* FIFOFULL configuration */
+ { ETM_FIFOFULL_REGION, 25, WO, 0x10, "ETM_FIFOFULL_REGION", },
+ { ETM_FIFOFULL_LEVEL, 8, WO, 0x10, "ETM_FIFOFULL_LEVEL", },
+
+ /* ViewData configuration (data trace) */
+ { ETM_VIEWDATA_EVENT, 17, WO, 0x10, "ETM_VIEWDATA_EVENT", },
+ { ETM_VIEWDATA_CTRL1, 32, WO, 0x10, "ETM_VIEWDATA_CTRL1", },
+ { ETM_VIEWDATA_CTRL2, 32, WO, 0x10, "ETM_VIEWDATA_CTRL2", },
+ { ETM_VIEWDATA_CTRL3, 17, WO, 0x10, "ETM_VIEWDATA_CTRL3", },
+
+ /* Address comparator register pairs */
+#define ADDR_COMPARATOR(i) \
+ { ETM_ADDR_COMPARATOR_VALUE + (i), 32, WO, 0x10, \
+ "ETM_ADDR_COMPARATOR_VALUE" #i, }, \
+ { ETM_ADDR_ACCESS_TYPE + (i), 7, WO, 0x10, \
+ "ETM_ADDR_ACCESS_TYPE" #i, }
+ ADDR_COMPARATOR(0),
+ ADDR_COMPARATOR(1),
+ ADDR_COMPARATOR(2),
+ ADDR_COMPARATOR(3),
+ ADDR_COMPARATOR(4),
+ ADDR_COMPARATOR(5),
+ ADDR_COMPARATOR(6),
+ ADDR_COMPARATOR(7),
+
+ ADDR_COMPARATOR(8),
+ ADDR_COMPARATOR(9),
+ ADDR_COMPARATOR(10),
+ ADDR_COMPARATOR(11),
+ ADDR_COMPARATOR(12),
+ ADDR_COMPARATOR(13),
+ ADDR_COMPARATOR(14),
+ ADDR_COMPARATOR(15),
+#undef ADDR_COMPARATOR
+
+ /* Data Value Comparators (NOTE: odd addresses are reserved) */
+#define DATA_COMPARATOR(i) \
+ { ETM_DATA_COMPARATOR_VALUE + 2*(i), 32, WO, 0x10, \
+ "ETM_DATA_COMPARATOR_VALUE" #i, }, \
+ { ETM_DATA_COMPARATOR_MASK + 2*(i), 32, WO, 0x10, \
+ "ETM_DATA_COMPARATOR_MASK" #i, }
+ DATA_COMPARATOR(0),
+ DATA_COMPARATOR(1),
+ DATA_COMPARATOR(2),
+ DATA_COMPARATOR(3),
+ DATA_COMPARATOR(4),
+ DATA_COMPARATOR(5),
+ DATA_COMPARATOR(6),
+ DATA_COMPARATOR(7),
+#undef DATA_COMPARATOR
+
+ /* Counters */
+#define COUNTER(i) \
+ { ETM_COUNTER_RELOAD_VALUE + (i), 16, WO, 0x10, \
+ "ETM_COUNTER_RELOAD_VALUE" #i, }, \
+ { ETM_COUNTER_ENABLE + (i), 18, WO, 0x10, \
+ "ETM_COUNTER_ENABLE" #i, }, \
+ { ETM_COUNTER_RELOAD_EVENT + (i), 17, WO, 0x10, \
+ "ETM_COUNTER_RELOAD_EVENT" #i, }, \
+ { ETM_COUNTER_VALUE + (i), 16, RO, 0x10, \
+ "ETM_COUNTER_VALUE" #i, }
+ COUNTER(0),
+ COUNTER(1),
+ COUNTER(2),
+ COUNTER(3),
+#undef COUNTER
+
+ /* Sequencers */
+#define SEQ(i) \
+ { ETM_SEQUENCER_EVENT + (i), 17, WO, 0x10, \
+ "ETM_SEQUENCER_EVENT" #i, }
+ SEQ(0), /* 1->2 */
+ SEQ(1), /* 2->1 */
+ SEQ(2), /* 2->3 */
+ SEQ(3), /* 3->1 */
+ SEQ(4), /* 3->2 */
+ SEQ(5), /* 1->3 */
+#undef SEQ
+ /* 0x66 reserved */
+ { ETM_SEQUENCER_STATE, 2, RO, 0x10, "ETM_SEQUENCER_STATE", },
+
+#define OUT(i) \
+ { ETM_EXTERNAL_OUTPUT + (i), 17, WO, 0x10, \
+ "ETM_EXTERNAL_OUTPUT" #i, }
+
+ OUT(0),
+ OUT(1),
+ OUT(2),
+ OUT(3),
+#undef OUT
+
+#if 0
+ /* registers from 0x6c..0x7f were added after ETMv1.3 */
+
+ /* Context ID Comparators */
+ { 0x6c, 32, RO, 0x20, "ETM_CONTEXTID_COMPARATOR_VALUE1", }
+ { 0x6d, 32, RO, 0x20, "ETM_CONTEXTID_COMPARATOR_VALUE1", }
+ { 0x6e, 32, RO, 0x20, "ETM_CONTEXTID_COMPARATOR_VALUE1", }
+ { 0x6f, 32, RO, 0x20, "ETM_CONTEXTID_COMPARATOR_MASK", }
+
+ { 0x78, 12, WO, 0x20, "ETM_SYNC_FREQ", },
+ { 0x79, 32, RO, 0x20, "ETM_ID", },
+#endif