- set TAR size to 12 bits for Cortex-M3.
- Original patch submitted by Magnus Lundin [lundin@mlu.mine.nu].
git-svn-id: svn://svn.berlios.de/openocd/trunk@2051
b42882b7-edfa-0310-969c-
e2dbd0fdcd60
* are immediatley available.
*/
* are immediatley available.
*/
+
+/* ARM ADI Specification requires at least 10 bits used for TAR autoincrement */
+
+/*
+ u32 tar_block_size(u32 address)
+ Return the largest block starting at address that does not cross a tar block size alignment boundary
+*/
+static u32 max_tar_block_size(u32 tar_autoincr_block, u32 address)
+{
+ return (tar_autoincr_block - ((tar_autoincr_block - 1) & address)) >> 2;
+}
+
/***************************************************************************
* *
* DPACC and APACC scanchain access through JTAG-DP *
/***************************************************************************
* *
* DPACC and APACC scanchain access through JTAG-DP *
- /* Adjust to write blocks within 4K aligned boundaries */
- blocksize = (0x1000 - (0xFFF & address)) >> 2;
+ /* Adjust to write blocks within boundaries aligned to the TAR autoincremnent size*/
+ blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
if (wcount < blocksize)
blocksize = wcount;
if (wcount < blocksize)
blocksize = wcount;
- /* Adjust to read within 4K block boundaries */
- blocksize = (0x1000 - (0xFFF & address)) >> 1;
+ /* Adjust to write blocks within boundaries aligned to the TAR autoincremnent size*/
+ blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
if (wcount < blocksize)
blocksize = wcount;
if (wcount < blocksize)
blocksize = wcount;
- /* Adjust to read within 4K block boundaries */
- blocksize = (0x1000 - (0xFFF & address));
+ /* Adjust to write blocks within boundaries aligned to the TAR autoincremnent size*/
+ blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
if (wcount < blocksize)
blocksize = wcount;
if (wcount < blocksize)
blocksize = wcount;
- /* Adjust to read within 4K block boundaries */
- blocksize = (0x1000 - (0xFFF & address)) >> 2;
+ /* Adjust to read blocks within boundaries aligned to the TAR autoincremnent size*/
+ blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
if (wcount < blocksize)
blocksize = wcount;
if (wcount < blocksize)
blocksize = wcount;
- /* Adjust to read within 4K block boundaries */
- blocksize = (0x1000 - (0xFFF & address)) >> 1;
+ /* Adjust to read blocks within boundaries aligned to the TAR autoincremnent size*/
+ blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
if (wcount < blocksize)
blocksize = wcount;
if (wcount < blocksize)
blocksize = wcount;
- /* Adjust to read within 4K block boundaries */
- blocksize = (0x1000 - (0xFFF & address));
+ /* Adjust to read blocks within boundaries aligned to the TAR autoincremnent size*/
+ blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
if (wcount < blocksize)
blocksize = wcount;
if (wcount < blocksize)
blocksize = wcount;
u8 ack;
/* extra tck clocks for memory bus access */
u32 memaccess_tck;
u8 ack;
/* extra tck clocks for memory bus access */
u32 memaccess_tck;
+ /* Size of TAR autoincrement block, ARM ADI Specification requires at least 10 bits */
+ u32 tar_autoincr_block;
+
+/* Accessor function for currently selected DAP-AP number */
+static inline u8 dap_ap_get_select(swjdp_common_t *swjdp)
+{
+ return (u8)( swjdp ->apsel >> 24);
+}
+
/* Internal functions used in the module, partial transactions, use with caution */
extern int dap_dp_write_reg(swjdp_common_t *swjdp, u32 value, u8 reg_addr);
/* extern int swjdp_write_apacc(swjdp_common_t *swjdp, u32 value, u8 reg_addr); */
/* Internal functions used in the module, partial transactions, use with caution */
extern int dap_dp_write_reg(swjdp_common_t *swjdp, u32 value, u8 reg_addr);
/* extern int swjdp_write_apacc(swjdp_common_t *swjdp, u32 value, u8 reg_addr); */
armv7m->swjdp_info.ap_tar_value = -1;
armv7m->swjdp_info.jtag_info = &cortex_m3->jtag_info;
armv7m->swjdp_info.memaccess_tck = 8;
armv7m->swjdp_info.ap_tar_value = -1;
armv7m->swjdp_info.jtag_info = &cortex_m3->jtag_info;
armv7m->swjdp_info.memaccess_tck = 8;
+ armv7m->swjdp_info.tar_autoincr_block = (1<<12); /* Cortex-M3 has 4096 bytes autoincrement range */
/* initialize arch-specific breakpoint handling */
/* initialize arch-specific breakpoint handling */
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