target: add Espressif ESP32-S2 basic support
[openocd.git] / tcl / target / ls1046a.cfg
1 # SPDX-License-Identifier: GPL-2.0-or-later
2 # NXP LS1046A
3
4 if { [info exists CHIPNAME] } {
5 set _CHIPNAME $CHIPNAME
6 } else {
7 set _CHIPNAME ls1046a
8 }
9
10 if { [info exists DAP_TAPID] } {
11 set _DAP_TAPID $DAP_TAPID
12 } else {
13 set _DAP_TAPID 0x5ba00477
14 }
15
16 if { [info exists SAP_TAPID] } {
17 set _SAP_TAPID $SAP_TAPID
18 } else {
19 set _SAP_TAPID 0x06b3001d
20 }
21
22 jtag newtap $_CHIPNAME dap -irlen 4 -expected-id $_DAP_TAPID
23 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.dap
24
25 target create $_CHIPNAME.axi mem_ap -dap $_CHIPNAME.dap -ap-num 0
26
27 set _CPU_BASE 0x80400000
28 set _CPU_STRIDE 0x100000
29 set _CPU_DBGOFF 0x10000
30 set _CPU_CTIOFF 0x20000
31
32 set _TARGETS {}
33 for {set i 0} {$i < 4} {incr i} {
34 set _BASE [expr {$_CPU_BASE + $_CPU_STRIDE * $i}]
35 cti create $_CHIPNAME.cti$i -dap $_CHIPNAME.dap -ap-num 1 \
36 -baseaddr [expr {$_BASE + $_CPU_CTIOFF}]
37 target create $_CHIPNAME.cpu$i aarch64 -dap $_CHIPNAME.dap \
38 -cti $_CHIPNAME.cti$i -dbgbase [expr {$_BASE + $_CPU_DBGOFF}] \
39 -coreid $i {*}[expr {$i ? {-defer-examine} : {-rtos hwthread} }]
40 lappend _TARGETS $_CHIPNAME.cpu$i
41 }
42
43 target smp {*}$_TARGETS
44
45 jtag newtap $_CHIPNAME sap -irlen 8 -expected-id $_SAP_TAPID
46 target create $_CHIPNAME.sap ls1_sap -chain-position $_CHIPNAME.sap -endian big
47
48 proc core_up { args } {
49 foreach core $args {
50 $::_CHIPNAME.cpu$core arp_examine
51 }
52 }
53
54 targets $_CHIPNAME.cpu0
55
56 adapter speed 10000

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