--- /dev/null
+#
+# M0+ devices only have SW-DP, but swj-dp code works, just don't
+# set any jtag related features
+#
+
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME stm32l0
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 8kB (max ram on smallest part)
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x2000
+}
+
+# JTAG speed should be <= F_CPU/6.
+# F_CPU after reset is ~2MHz, so use F_JTAG max = 333kHz
+adapter_khz 300
+
+adapter_nsrst_delay 100
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ # Arm, m0+, non-multidrop.
+ # http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka16088.html
+ set _CPUTAPID 0x0bc11477
+}
+
+swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+# flash size will be probed
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
+
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to
+ # perform a soft reset
+ cortex_m reset_config sysresetreq
+}
+
+proc stm32l0_enable_HSI16 {} {
+ # Enable HSI16 as clock source
+ echo "STM32L0: Enabling HSI16"
+
+ # Set HSI16ON in RCC_CR (leave MSI enabled)
+ mww 0x40021000 0x00000101
+
+ # Set HSI16 as SYSCLK (RCC_CFGR)
+ mww 0x4002100c 0x00000001
+
+ # Increase speed
+ adapter_khz 2500
+}
+
+$_TARGETNAME configure -event reset-init {
+ stm32l0_enable_HSI16
+}
+
+$_TARGETNAME configure -event reset-start {
+ adapter_khz 300
+}
-# script for stm32l
-
#
-# stm32 devices support both JTAG and SWD transports.
+# stm32l1 devices support both JTAG and SWD transports.
#
+
source [find target/swj-dp.tcl]
if { [info exists CHIPNAME] } {
# See STM Document RM0038
# Section 30.6.3 - corresponds to Cortex-M3 r2p0
set _CPUTAPID 0x4ba00477
- } {
- set _CPUTAPID1 0x2ba01477
- set _CPUTAPID2 0x0bc11477
+ } else {
+ # SWD IDCODE (single drop, arm)
+ set _CPUTAPID 0x2ba01477
}
}
-if { [using_jtag] } {
- swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-} else {
- swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID1 -expected-id $_CPUTAPID2
-}
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
if { [info exists BSTAPID] } {
# FIXME this never gets used to override defaults...
proc stm32l_enable_HSI {} {
# Enable HSI as clock source
echo "STM32L: Enabling HSI"
-
+
# Set HSION in RCC_CR
mww 0x40023800 0x00000101
-
+
# Set HSI as SYSCLK
mww 0x40023808 0x00000001
-
+
# Increase JTAG speed
adapter_khz 2000
}